- Austin, Texas, United States +1 more
- On-site
- 10+ years
Support gate-level glitch noise and static timing analysis (STA) methodologies for Apple silicon across advanced technology nodes.
Locations (2)
- Austin, Texas, United States
- Sunnyvale, California, United States
Responsibilities
- Define and architect consistent noise and STA analysis methodology, margins, and tool/version qualification strategy
- Own and drive flows and scripts for core gate-level noise and static timing analysis tools end to end
- Conduct deep root-cause analysis of noise violations and timing-path anomalies
- Serve as the technical authority and primary point of contact for design and Physical Design teams on noise/timing constraint, flow, and closure issues
- Drive noise and STA methodology improvements using AI coding agents
Requirements
- BS in Electrical Engineering, Computer Engineering, or related technical discipline
- Nice to have: BS or MS in a technical discipline