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Skill:ASIC implementation

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1–2 jobs· newest first

Senior Staff DSP Engineer
SEAKR Engineering · Centennial, US
$180K–$230KSenior
Sr. Implementation Engineer, Amazon Leo
Amazon · Sunnyvale, US
$213K–$288KOn-site · Full-time · Senior

+10K new in the last hour

Senior Staff DSP Engineer

SEAKR Engineering · Posted Nov 4, 2026

Centennial, Colorado, United States
Senior
$180K–$230K per year
12+ years

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Senior technical leader responsible for defining and advancing Digital Signal Processing (DSP) solutions across complex programs and technical initiatives.

Compensation

Compensation: Base salary range is $180,000-230,000/year, depending on qualifications.

Responsibilities

Define and advance DSP solutions across programs
Lead resolution of highly complex engineering challenges
Establish DSP methodologies, architectures, and best practices
Provide technical leadership throughout engineering lifecycle
Mentor DSP engineers and senior technical contributors

Requirements

Bachelor's in Electrical Engineering
Master's degree
Nice to have: Image Processing
Nice to have: Software Defined Radio
Nice to have: Channelization/Reconstruction

Skills

Digital Signal Processing architecture Algorithm development Implementation Integration Verification FPGA implementation ASIC implementation Verilog VHDL MATLAB C/C++ modeling Trade studies Design reviews Risk resolution Mentoring C/C++

Benefits

Medical insurance
Dental insurance
Vision insurance
401(k) retirement plan
Year-end bonus

See full job description

Sr. Implementation Engineer, Amazon Leo

Amazon · Posted Nov 4, 2026

Sunnyvale, California, United States
On-site
Full-time · Senior
$213K–$288K per year
8+ years

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Responsible for defining and implementing digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways.

Compensation

USA, CA, Sunnyvale - 213,000.00 - 287,500.00 USD annually

Responsibilities

Work with the ASIC design team to develop the chip power intent using UPF
Work with the ASIC design team to validate UPF at RTL and netlist level using industry standard tools
Set up the flow for both logic and physical synthesis flow for various technology nodes
Develop implementation methodologies while embracing AI flow
Work with the ASIC design and DFT teams to understand the design and create timing constraints

Requirements

Bachelor's degree in Electrical Engineering or a related field
Nice to have: Master's or Ph.D degree in Electrical / Communications Engineering
Nice to have: 10+ years of experience in ASIC implementation
Nice to have: leading physical design
Nice to have: UPF flow for low power design

Skills

ASIC implementation synthesis STA P&R

deep sub-micron nodes

16nm or smaller

physical synthesis

taping out chips

Benefits

health insurance
medical
vision
prescription
Basic Life & AD&D insurance

See full job description