Lead PCB layout for automotive HPC and chiplet platforms, delivering manufacturable designs with design teams and external suppliers. Improve efficiency through AI-enabled automation, process and library management, and team mentoring.
Responsibilities
Own multilayer/HDI placement, fine-pitch BGA escape, and routing from approved schematics and mechanical constraints through release
Route DDR/LPDDR, PCIe, Ethernet, and SerDes to SI/PI constraints; implement power/ground, decoupling, and thermal/EMC requirements
Coordinate design, SI/PI, mechanical, manufacturing teams, and external PCB suppliers on stack-ups, materials, vias, cost, reliability, and manufacturability
Manage footprints, pad stacks, and ECAD libraries; improve request, naming, validation, approval, versioning, traceability, reuse, and obsolescence processes
Lead layout/DRC and DFM/DFA/DFT reviews, resolve supplier issues, and release Gerber/ODB++, drill, stack-up, drawing, placement, and BOM data
Requirements
Bachelor’s degree in Electrical/Electronic Engineering or equivalent
Join an experienced physical design team working on AMD graphics IP for next-generation AI data center chips. In this role, you will own and drive complex physical design work for multi-million-gate blocks, delivering designs against challenging performance, power, and area targets using advanced process technologies.
Locations (2)
Austin, Texas, United States
Santa Clara, California, United States
Responsibilities
Own the physical design of complex, multi-million-gate graphics IP blocks and drive designs toward required performance, power, and area targets.
Partner with RTL design teams to identify frequency bottlenecks and address logic-level and timing issues early in the project lifecycle.
Drive floorplanning, power planning, synthesis, placement, clock tree synthesis, routing, extraction, timing closure, and physical verification.
Perform and support DRC/LVS verification, crosstalk analysis, and EM/IR analysis through final design signoff.
Establish and improve physical design methodologies for large IP delivery, including IP integration and design-quality checks.
Requirements
Bachelors or Masters in Electronics/Electrical Engineering
Nice to have: AI techniques for performance, power, and area optimization
Sr. Staff Physical Design EngineerAdvanced Micro Devices, Inc · Austin, US+1 more