- Mountain View, California, United States
- Hybrid
- Full-time · Senior
- $164K–$222K per year
- 5+ years
Lead the development of ASICs for next-generation AI computing architecture, designing RTL modules, debugging mixed-signal simulations, and integrating silicon photonic communication into digital accelerator designs.
Compensation
$164,000—$222,000 USD
Responsibilities
- Develop RTL (SystemVerilog) modules with DFT considerations for IC development
- Debug complex logic and mixed signal simulations
- Integrate silicon photonic communication and compute technology into digital accelerator design
- Collaborate with Architecture, Design Verification, Physical Design, Photonic, Analog and Software teams to realize high performance, low power designs
- Create design specifications and documentation
Requirements
- Bachelor’s degree in Electrical or Computer Engineering (or related fields)
- Nice to have: Master's degree in Electrical or Computer Engineering
- Nice to have: PCIe
- Nice to have: Processor design
- Nice to have: Accelerators