- Bengaluru, Karnataka, India
- Full-time · Senior
- 6+ years
Validates and researches compiler optimizations, partial reconfiguration flow, and debugging features for Altera FPGA hardware.
Responsibilities
- Validates and researches compiler optimizations, partial reconfiguration flow, and debugging features like SignalTap & System Console using Quartus Design Software and Altera FPGA hardware
- Creates designs using HDLs and Altera IPs and verifies them for functionality and timing on Altera FPGA hardware boards
- Regresses designs during each release for QoR and monitors performance over targeted FPGA devkits
- Collaborates with cross-functional teams to develop and improve validation strategies and resolve customer issues
Requirements
- Master's/Bachelor's Degree in Electronics/VLSI/Digital Design or other related disciplines