Referso Jobs

Serve as a key contributor to FPGA design efforts
Drive logic design of key FPGA blocks & full chip and bring best-in-class methodologies to accelerate design time and improve design quality
Ensuring design quality through assertions, checkers, and scripting
Develop strong relationships with worldwide teams
Mentor and develop strong partners and colleagues

Requirements

BS/MS/PhD Electronics Engineering
BS/MS/PhD Electrical Engineering
BS/MS/PhD Computer Science

Skills

RTL design Verilog System Verilog SoC integration Micro-architecture definition 3rd party IP selection ARM processor

Senior Engineer (Level 1)

Arrow Electronics, Inc. · Posted Feb 27, 2025

Open

Noida, Uttar Pradesh, India
On-site
Full-time · Senior
5–20 years

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Senior Engineer focused on RTL design, Lower Power Synthesis, and UPF Flow with ASIC/FPGA experience.

Responsibilities

RTL design
Lower Power Synthesis
Low Power Design
UPF Flow
RTL debug

Skills

RTL design Verilog VHDL ASIC FPGA Lint/CDC tool Xilinx Altera/Intel FPGA I2C SPI UART PCIe MIPI AXI

Qualitätsprüfer (m/w/d) Elektronikfertigung

Emerson · Posted Nov 9, 2026

Open

Augsburg, Bavaria, Germany
On-site
Full-time · Mid

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Role involving visual intermediate and final inspections of electronic assemblies (PCBA), incoming inspections of PCBs, and quality complaint processing using 8D methods.

Responsibilities

Durchführung visueller Zwischen- und Endkontrollen von bestückten Elektronikbaugruppen (PCBA) gemäß IPC-A-610-Standard
Durchführung erweiterter Wareneingangskontrollen von Rohleiterplatten (PCB) sowie elektronischen Bauteilen einschließlich der erforderlichen Dokumentation
Bearbeitung, Verifizierung und Nachverfolgung interner sowie externer Reklamationen unter Anwendung etablierter Qualitätsmethoden, insbesondere der 8D-Methode
Unterstützung bei Ursachenanalysen sowie der Umsetzung von Korrektur- und Vorbeugemaßnahmen
Fachliche Beratung und Unterstützung von Produktionsmitarbeitenden bei qualitätsrelevanten Fragestellungen

Requirements

Abgeschlossene elektrotechnische Ausbildung
Elektroniker
Industrieelektroniker
Mechatroniker
Staatlich geprüfter Elektrotechniker

Skills

IPC-A-610 8D-Methode ISO 9001 MS Office

Senior Software Engineer

BAE Systems · Posted Nov 8, 2026

Open

Endicott, New York, United States
Hybrid
Senior
5+ years

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Senior Software Engineer to participate in Electronic Systems development programs at any of the locations listed above.

Responsibilities

Model, design, develop, integrate, debug, test, field, and support innovative Electronic Systems

Requirements

Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or related field
Nice to have: Aviation-related embedded control systems
Nice to have: Flight controls
Nice to have: Engine controls
Nice to have: Mission systems

Skills

Embedded software development C/C++Assembly language programming Target hardware integration and testing Embedded control systems Multi-tasking and multi-core software execution ARM cores

Digital Design Engineer

Fortaegis Technologies · Posted Oct 2, 2026

Open

Amsterdam, North Holland, Netherlands
Senior
5+ years

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Design, develop, and integrate RTL and IP for FPGA and ASIC-based products.

Responsibilities

Design and implement RTL based on system-level requirements
Develop, integrate, and maintain custom and third-party IP
Integrate IP and subsystems at the block and top level
Run synthesis and implementation flows and drive timing closure
Perform RTL quality checks and support verification

Requirements

Nice to have: high-speed networking
Nice to have: cryptographic IP
Nice to have: IP evaluation
Nice to have: vendor engagement

Skills

SystemVerilog Verilog VHDL FPGA ASIC AXI PCIe Ethernet DDR

Senior Engineer - IC Design (RTL AMS)

Silicon Labs · Posted Sep 28, 2026

Open

Hyderabad, Telangana, India
Senior
3+ years

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RTL Design Engineer for Mixed-Signal IPs responsible for developing, integrating, and verifying digital RTL blocks within mixed-signal subsystems.

Responsibilities

Develop synthesizable, high-quality RTL for mixed-signal IPs such as ADC/DAC interfaces, PLL/DLL control, power management units, and sensor front-ends.
Collaborate with analog design engineers to define digital-analog interface specifications, control logic, and communication protocols.
Ensure correct functionality and performance of mixed-signal IPs through behavioral modeling, simulation, and co-verification with analog components.
Participate in design reviews, micro-architecture definition, and documentation of IP functionality and timing interfaces.
Perform design quality checks including lint, CDC, RDC, and synthesis readiness analyses.

Requirements

B.E./B.Tech or M.S./M.Tech in Electrical Engineering, Electronics, or Computer Engineering

Skills

Verilog SystemVerilog synthesis static verification lint

Principal FPGA Design Engineer

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Open

Santa Clara, California, United States
Full-time · Senior
12+ years

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Lead FPGA system design and integration for AMD networking products

Responsibilities

Lead full design lifecycle of FPGA-based networking products
Define FPGA microarchitecture and design specifications
Develop and verify Verilog/SystemVerilog RTL
Implement FPGA flow including synthesis, place and route, timing closure
Integrate hardware, software, and diagnostic teams for rapid bring-up

Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field

Skills

FPGA design Verilog SystemVerilog Vivado Vitis Lattice toolchains PCIe I2C MDIO

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