- Mountain View, California, United States
- $143K–$275K per year
- 3+ years
Lead design verification and design engineering for subsystems in Microsoft’s cloud hardware.
Compensation
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Responsibilities
- Technically lead a subsystem as a design or DV engineer
- Collaborate across teams on vertical and horizontal reuse of components
- Provide technical leadership through mentorship and strong teamwork
- Work effectively with Architecture, Design, DV, PD, DFT, firmware, and post-silicon teams to debug system-level issues and deliver silicon from concept through bring-up
Requirements
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Nice to have: Experience debugging RTL designs
- Nice to have: Experience with design quality and static checks