Memory BIST insertion jobs

Understanding Broadcom & customer DFT feature requirements
Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Working closely with STA and DI Engineers design closure for test
Generating, Verifying & Debugging Test vectors before tape release
Validating & Debugging Test vectors on ATE during the silicon bring up phase

Requirements

Bachelors in Electrical/Electronic/Computer Engineering
Masters Degree in Electrical/Electronic/Computer Engineering

Skills

TCL PERL RUBY PYTHON C++Verilog coding testbench generation & simulation

DFT Engineer

Broadcom · Posted Nov 6, 2026

Open

San Jose, California, United States
5+ years

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Design, implement, and verify DFT programs for ASIC products at Broadcom's San Jose Development Center.

Compensation

The annual base salary range for this position is USD To USD

Responsibilities

Understand DFT feature requirements
Implement DFT including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Work closely with STA and DI Engineers for test closure
Generate, verify and debug test vectors before tape release
Validate and debug test vectors on ATE during silicon bring up

Requirements

Bachelor's in Electrical/Electronic/Computer Engineering
Master's in Electrical/Electronic/Computer Engineering

Skills

TCL PERL RUBY PYTHON C++DFT background Scan insertion DFT compiler

DFT Engineer

Broadcom · Posted Nov 6, 2026

Open

Austin, Texas, United States
5+ years

Apply with RefersoAI Apply on careers page

Design, implement, and verify DFT programs for Broadcom ASIC products.

Compensation

The annual base salary range for this position is USD To USD

Responsibilities

Understand DFT feature requirements
Implement DFT including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Work closely with STA and DI Engineers for test closure
Generate, verify and debug test vectors before tape release
Validate and debug test vectors on ATE during silicon bring up

Requirements

Bachelor's in Electrical/Electronic/Computer Engineering
Master's in Electrical/Electronic/Computer Engineering

Skills

DFT background Scan insertion and compression ATPG vector generation Verilog coding Testbench generation Memory BIST insertion

DFT Lead Engineer

DFT Lead Engineer

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DFT Engineer

Compensation

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DFT Engineer

Compensation

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DFT Engineer

Compensation

Responsibilities

Requirements

Skills

Benefits

Benefits

Benefits