The Advanced Microscopy team is looking for experienced Materials Analyst with a background in operating and analyzing materials using TEM (Transmission Electron Microscopy) to support advanced materials and semiconductor analysis.
Compensation
Compensation is aligned with market standards for the region and tailored to individual qualifications and experience.
Responsibilities
Obtaining TEM and STEM images of prepared samples
Obtaining STEM/EDX and STEM/EELS spectra, line scans and maps
Organizing data, prepare and deliver summary reports to customers
Partnering with customers and team members to optimize experiments and explain results
Developing TEM analysis protocols for new sample types
Requirements
Bachelor's degree in Materials Science and Engineering
Master's degree in Materials Science and Engineering
Lead early-stage technology investigation and process integration for next-generation DRAM architectures.
Compensation
$159,000.00 - $271,000.00 a year
Responsibilities
Lead pathfinding investigations of next-generation DRAM concepts, materials, process architectures, and advanced patterning solutions, including High-NA EUV
Develop and integrate process flows across lithography, dry etch, thin films, CMP, metrology, device engineering, and manufacturing while balancing performance, yield, reliability, manufacturability, and cost
Design and implement DOE and technology-learning experiments, using statistical and AI-assisted analytics to evaluate electrical, defectivity, metrology, reliability, and yield data
Collaborate with NY CREATES, equipment suppliers, research partners, and Micron teams to evaluate emerging capabilities and influence technology priorities while protecting Micron intellectual property
Support the transition of successful pathfinding concepts into technology development and production by documenting key learning, technical assumptions, risks, and recommendations
Requirements
Master’s degree in Electrical Engineering, Physics, Materials Science, Chemical Engineering, or a related technical field
Nice to have: Ph.D. in Electrical Engineering, Physics, Materials Science, or related field
The Sr. R&D Engineer will lead the development of ESD protection devices (TVS), including new device structures and process integration. coordinating TCAD simulation to accelerate process planning, device optimization, and development efficiency.
Responsibilities
Develop new TVS/ESD protection, including device structure design and process flow integration
Provide device structures and correlate TCAD results to plan new process modules and tune key parameters
Work with in-house and outsourced wafer fabs to develop, qualify, and transfer processes to manufacturing
Scout and evaluate leading-edge semiconductor device technologies, TVS/ESD protection solutions, and process innovations aligned to future product roadmaps
Lead projects, complex programs, major technical workstreams, multi-program initiatives, or technical portfolios involving multidisciplinary development, analysis, prototyping, integration, testing, evaluation, and technology transition.
Apply deep technical expertise and systems-level judgment to highly complex and ambiguous problems, evaluating alternatives, trade-offs, risks, stakeholder needs, and mission implications.
Translate broad or unclear objectives into actionable technical plans and influence program direction, architectures, systems, priorities, and roadmaps across teams, Groups, or mission areas.
Collaborate with multidisciplinary teams, sponsors, mission partners, and internal leaders to align priorities, resolve dependencies, and guide decisions and deliverables.
Assess and improve technical tools, processes, methods, documentation, execution practices, and organizational capability.
Requirements
Bachelor's degree in a STEM discipline or other relevant technical field
Master's degree in a STEM discipline or other relevant technical field
PhD in a STEM discipline or other relevant technical field
Process Integration and Technology Development Engineer
This role requires wide skill in the PCB industry, focusing on PCB layout and knowledge of manufacturing/assembly processes to design complex high-frequency PCBs.
Responsibilities
PCB layout and extensive knowledge of manufacturing and assembly processes and how to address problems as arise with FAB and assembly houses
Work with a wide variety of engineering disciplines to layout complex hi frequency PCB
Conduct peer and design reviews for PCB designs completed within the group as a participant
Participate in a ticket system for assigning jobs and reporting job status to the engineering community
Design dense and complex PCBs with a wide variety of component types, emphasis on RF signal requirements, and board fabrication technologies
Requirements
Associate Degree in Engineering Technology or equivalent
The IC Layout Designer is mainly responsible for the creation of analog block layouts, working with schematic designers to meet schedule and quality requirements.
Responsibilities
Creation of analog block layouts
Work with schematic designers and section or lead layout people
Meet schedule, design and quality requirements set by project stakeholders
Develop and release integrated circuit products in logic and switch families, managing design, verification, and layout using industry-standard EDA tools.
Responsibilities
Develop and release products combining integrated circuits and plastic packages
Contribute to cross‑functional teams during study, concept, design, validation, and qualification phases
Drive chip design, specifications setting, and verification
Own top‑level layout fit for required packages
Design integrated circuits in 0.5um to 0.18um CMOS and BCD wafer processes
DRAM Pathfinding & Process Integration EngineerNewMicron Technology · Remote, US
Electrical / Physics Engineer Advanced ImagingMIT Lincoln Laboratory · Lexington, US
Process Integration and Technology Development Engineeronsemi · Gresham, US