A highly motivated Device Engineer Intern to support semiconductor technology development, device characterization, and data analysis activities.
Locations (2)
San Jose, California, United States
United States
Compensation
The hourly pay range for this position, which could be performed in the US, is $19.00 - $30.00.
Responsibilities
Support characterization and evaluation of semiconductor devices including MOSFETs, bipolar transistors, diodes, resistors, capacitors, and high-voltage devices.
Analyze silicon test data and identify trends related to device performance, variability, reliability, and process changes.
Develop scripts and automation tools using Python, MATLAB, JMP, or similar software to improve data analysis efficiency.
Assist in the design and execution of characterization experiments at wafer level and package level.
Support technology development activities including process transfers, technology benchmarking, and device optimization.
Requirements
Currently pursuing a degree in Electrical Engineering, Materials Science, Physics, Semiconductor Engineering, or a related technical field.
Nice to have: Coursework or project experience in semiconductor devices, microelectronics, IC fabrication, or solid‑state physics
Nice to have: Experience with laboratory measurements and electronic test equipment
Nice to have: Familiarity with semiconductor characterization techniques and data analysis methods
Nice to have: Programming experience in Python, MATLAB, or other scripting languages
Pixel Designer responsible for designing and developing advanced pixels and associated readout circuits for image sensors, including simulation, layout, and electro-optical characterization.
Locations (3)
Crolles, Auvergne-Rhône-Alpes, France
Grenoble, Auvergne-Rhône-Alpes, France
Édimbourg, Scotland, United Kingdom
Responsibilities
Evaluate pixel specifications against product and system requirements
Develop new pixels and contribute to test device design
Design and simulate pixels and their interfaces
Analyze electro-optical characterization data and measurement results
Integrate design, simulation, and measurement outcomes to assess pixel performance
For this position, we offer a gross annual salary of approximately €120,000 to €160,000. The final compensation package will be determined based on your experience, qualifications, and technical expertise.
Responsibilities
Drive the definition of technology roadmaps and long-term strategies for High Voltage Power Semiconductor device platforms.
Identify emerging technologies, market trends, and competitive opportunities.
Assess and influence the alignment of device technologies with customer and application requirements.
Generate intellectual property through patents and technical publications.
Serve as the company's technical expert for critical device and technology challenges.
The Sr. R&D Engineer will lead the development of ESD protection devices (TVS), including new device structures and process integration. coordinating TCAD simulation to accelerate process planning, device optimization, and development efficiency.
Responsibilities
Develop new TVS/ESD protection, including device structure design and process flow integration
Provide device structures and correlate TCAD results to plan new process modules and tune key parameters
Work with in-house and outsourced wafer fabs to develop, qualify, and transfer processes to manufacturing
Scout and evaluate leading-edge semiconductor device technologies, TVS/ESD protection solutions, and process innovations aligned to future product roadmaps
Lead projects, complex programs, major technical workstreams, multi-program initiatives, or technical portfolios involving multidisciplinary development, analysis, prototyping, integration, testing, evaluation, and technology transition.
Apply deep technical expertise and systems-level judgment to highly complex and ambiguous problems, evaluating alternatives, trade-offs, risks, stakeholder needs, and mission implications.
Translate broad or unclear objectives into actionable technical plans and influence program direction, architectures, systems, priorities, and roadmaps across teams, Groups, or mission areas.
Collaborate with multidisciplinary teams, sponsors, mission partners, and internal leaders to align priorities, resolve dependencies, and guide decisions and deliverables.
Assess and improve technical tools, processes, methods, documentation, execution practices, and organizational capability.
Requirements
Bachelor's degree in a STEM discipline or other relevant technical field
Master's degree in a STEM discipline or other relevant technical field
PhD in a STEM discipline or other relevant technical field
Lead the receiver (Rx) photonic integrated circuit for the OPU platform, owning design from photodetector device to chip-level architecture and tapeout.
Locations (2)
Austin, Texas, United States
Sunnyvale, California, United States
Responsibilities
Define the Rx PIC architecture, including optical input coupling, routing, demultiplexing, and layout of dense photodetector arrays
Design and optimize high-speed photodetectors for responsivity, dark current, capacitance, bandwidth, linearity, and saturation
Model the device and receiver with optical, electrical, and RF simulation
Work with the electronic IC team on the PD–TIA interface
Analyze array-level effects such as optical and electrical crosstalk, uniformity, thermal behavior, and yield
Requirements
PhD in Electrical Engineering, Applied Physics, or Physics
Nice to have: 5+ years of experience developing high-speed silicon photonics receivers or photodetectors
Master's or PhD in Physics, Electronic Engineering or related field
Nice to have: CMOS fabrication process knowledge
Nice to have: TCAD or other device/process simulation tools
Nice to have: Device characterization on bench
Nice to have: Programming or scripting (C/C++, Python, MATLAB, SKILL)
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