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1–2 jobs· newest first

Eng II - Elec
BAE Systems · Westminster, US
On-site
Eng Sr - Elec
BAE Systems · Westminster, US
$30K–$30KOn-site · Full-time · Senior

+10K new in the last hour

Eng II - Elec

BAE Systems · Posted Nov 10, 2026

Westminster, Colorado, United States
On-site
2+ years

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FPGA Verification Engineer in the Tactical Solutions Strategic Business Unit, responsible for designing, implementing, and testing FPGA verification environments for defense-oriented electronic systems.

Responsibilities

Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems.
Work in a fast-paced team environment on a variety of R&D, proof of concept, and production programs.
Verify FPGA designs, design and implement test benches for both unit level and system level environments, and create reusable verification environments that can be used across multiple projects.
Work in a System Verilog/UVM environment developing tests, testbenches, UVM components, and regressions/testlists.
Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix.

Requirements

BS degree or higher in Engineering or a related technical field
Nice to have: Modelsim/Questa simulator
Nice to have: C++ object-oriented programming
Nice to have: Windows
Nice to have: Linux

Skills

FPGA/ASIC Verification development methodology System Verilog UVM electronic circuit design object-oriented concepts class-based constrained random test benches coverage writing coverpoints crosses Modelsim Questa C++Ruby Python TCL Windows Linux

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Eng Sr - Elec

BAE Systems · Posted Nov 10, 2026

Westminster, Colorado, United States
On-site
Full-time · Senior
$30K–$30K per year
4+ years

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Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems and verify FPGA designs across multiple projects.

Compensation

Minimum $30,000 Sign On Bonus being offered for external hires.

Responsibilities

Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems.
Work in a fast-paced team environment on a variety of R&D, proof of concept, and production programs.
Verify FPGA designs (including SOC architectures utilizing soft-core processors, digital filters, image processing algorithms, and communication interfaces/protocols), design and implement test benches for both unit level and system level environments, and create reusable verification environments that can be used across multiple projects.
Work in a System Verilog/UVM environment developing tests, testbenches, UVM components, and regressions/testlists.
Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix.

Requirements

BS degree or higher in Engineering or a related technical field
Nice to have: Modelsim/Questa simulator
Nice to have: C++ object-oriented programming
Nice to have: Windows
Nice to have: Linux

Skills

FPGA/ASIC Verification development methodology

electronic circuit design

electronic systems

object-oriented concepts

class-based constrained random test benches

coverage writing (coverpoints, crosses)

coverage collection

improving coverage of the design under test

See full job description