Senior Validation Engineer with expertise in functional, electrical, high speed interfaces, memory, power/performance, debug/BU and tool development within the Post-Silicon Validation team.
The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
- Develop validation strategy, requirements, environments, tools, and methodologies including debug board and hardware/software requirements
- Write test plans and implement them by developing test content, scripts, tools, and other verification collateral
- Execute content in post-silicon, triage, and debug failures
- Engage with partners to drive continuous improvement to design, validation plans/collateral, and methodology to prevent, reduce, and/or find bugs sooner, more easily, or more reliably
- Provide technical guidance, coaching, and mentorship to other engineers in your areas of expertise
- Doctorate in Electrical Engineering
- Doctorate in Computer Engineering
- Doctorate in Computer Science
- Master's Degree in Electrical Engineering
- Master's Degree in Computer Engineering
System Level Test EngineerQualcomm · Singapore, Singapore