In the role of a SI Engineer within the Signal Integrity group you will be responsible for completing tasks on time and solving short and long term problems.
Locations (2)
Jhubei City, Taiwan
California, United States
Responsibilities
Perform signal and power integrity analysis for high‑speed interconnects (PCB, package, MLO, probe card)
Develop and validate electrical models for transmission lines, vias, connectors, PDN structures
Define stack‑ups, impedance targets, and routing constraints
Evaluate and optimize reflections, insertion/return loss, crosstalk and jitter performance
Use EM and circuit tools (HFSS, ADS, SIwave, PowerSI) for frequency‑domain and time‑domain analysis
Requirements
BS/MS in Electrical Engineering (or related field)
Nice to have: Hands‑on experience with measurement tools (VNA, TDR/TDT)
Nice to have: Experience with high‑speed interfaces (PAM4, SerDes, PCIe, HBM)
Sr Principal Signal Integrity Engineer responsible for improving SI/PI performance, production design analysis, measurement, and characterizing for high-speed interconnects.
Responsibilities
Perform signal and power integrity analysis for high-speed interconnects (PCB, package, MLO, probe card).
Develop and validate electrical models for Transmission lines, vias, connectors, and PDN (Power Distribution Network) structure.
Define stack-ups, impedance targets, and routing constraints.
Evaluate and optimize Reflections, insertion/return loss, and Crosstalk and jitter performance.
Use EM and circuit tools (e.g., HFSS, ADS, SIwave, PowerSI) for Frequency-domain and time-domain analysis.
Requirements
BS/MS in Electrical Engineering (or related field)
Develop chip package board PDN models and perform simulations to verify supply noise, impedance, and transient response; define PI requirements, specifications, and decoupling strategies; debug and root cause PI issues; correlate silicon measurements with simulations; collaborate with architecture, silicon, package, and board teams to deliver system aware PI solutions; improve PI methodologies, automation flows, and analysis processes.
Responsibilities
Develop chip package board PDN models and perform simulations to verify supply noise, impedance, and transient response
Define PI requirements, specifications, and decoupling strategies for all major power rails
Debug and root cause PI issues during bring up, validation, and production phases
Correlate silicon measurements with simulations and refine models accordingly
Collaborate with architecture, silicon, package, and board teams to deliver system aware PI solutions
Requirements
Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, or related field
Assist in the design and development of embedded hardware systems, including component selection, schematic capture, printed circuit board (PCB) development, and FPGA integration.
Support feasibility studies, simulations, engineering analyses, and prototype evaluations to assess performance, reliability, manufacturability, and cost.
Partner with hardware, firmware, manufacturing, test, and quality teams throughout the product lifecycle to deliver high-quality solutions.
Participate in design reviews, troubleshooting activities, root-cause analysis, and corrective action implementation.
Perform laboratory testing, debugging, validation, and verification using standard test equipment and automated test systems.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
Nice to have: Internship, co-op, academic project, research, or hands-on experience involving embedded systems or electronics development
Nice to have: High-speed digital design, signal integrity, and power integrity principles
Nice to have: Scripting or automation tools such as Python, TCL, MATLAB
Nice to have: Simulation and analysis tools such as HyperLynx, Ansys, SIwave
Part of a premier design team responsible for the architecture, design, implementation, and integration of the baseband system for all Apple products, focusing on the digital and power management domain of wireless chipsets.
Responsibilities
Architecture, design, implementation, and integration of the baseband system for all Apple products
Responsible for digital and power management domain of all wireless chipset from concept to product announcement
Heavy cross-functional collaboration with Apple SoC, battery, sensors, and iOS teams
Maintain a firm grasp of the entire product landscape outside of wireless design
Perform international travel when approved
Requirements
BSEE
Nice to have: signal integrity and power integrity simulation
In this role, you’ll work to shape the future of AI/ML hardware acceleration, driving cutting-edge TPU (Tensor Processing Unit) technology. You will lead chip and package design ensuring optimal SI/PI performance and system co-design from concept to production.
Lead signal integrity (SI) and power integrity (PI) analysis and optimization for High-Performance Computing (HPC) leveraging advanced 2.5D/3D packaging technologies.
Partner early in product definition to influence chip floor planning, Power Distribution Networks (PDN/power trees), netlists, and routability tradeoffs.
Evaluate high-speed interface IPs and develop next-generation memory interfaces across IO PHY, SI/PI, and physical design boundaries.
Drive post-silicon validation and qualification for NPI, balancing SI/PI performance and DFM constraints to achieve final package design closure.
Partner closely with silicon, system, and external vendor teams while developing simulation methodologies to boost modeling accuracy and efficiency.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science
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