As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products.
- Drive PPAC assessment and technology pathfinding for System-Technology Co-Optimization (STCO) and heterogeneous integration.
- Evaluate and develop 2.5D/3D chiplet integration solutions, including SoIC, CoWoS, WoW, hybrid bonding, interposer, and RDL technologies.
- Perform custom DRAM and 3D SRAM integration evaluation and pathfinding for advanced product development.
- Develop and support test-chip design, mask layout, design flows, and PDK enablement for advanced silicon and packaging technologies.
- Perform layout and design analysis for advanced technology benchmarking, DFM, and product issue debugging.
- Bachelor's degree in Science, Engineering, or related field
- Master's degree in Science, Engineering, or related field
- PhD in Science, Engineering, or related field
- Nice to have: TSMC SoIC
- Nice to have: TSMC CoWoS
Heterogeneous Integration Physical Design EngineerQualcomm · Hsinchu City, Taiwan