First software responder for fleet incidents, triaging, resolving, and automating incident handling for self-propelled battery-electric railcars and vehicles.
Compensation
Base salary: $70,000–$90,000
Responsibilities
Own the triage queue for incidents reported from the field and from internal alerts
Pull vehicle logs, telemetry, and service data, reproduce the issue where possible, and find the likely cause
Fix what can be fixed at this level—configuration, data, known-issue workarounds, and scripts—and route everything else to the owning software team
Write clear incident records and build a searchable history
Build scripts, dashboards, and AI agents to automate log retrieval, first triage, and routing
Requirements
Bachelor's degree in Computer Science or a related field
Coding bootcamp plus a portfolio of real debugging or automation projects
Nice to have: Docker
Nice to have: Basic networking (TCP/IP, ports, DNS)
Own the release and rollout of Dentrix, one of our flagship products, partnering with cross-functional teams to ensure successful product delivery and maintaining/improving the CI/CD pipeline.
Compensation
The posted range for this position is $115,000 - $155,000, which is the expected starting salary range for an employee who is new to the role to fully proficient in the role. This position is eligible for a bonus target not reflected in the range.
Responsibilities
Own the rollout of Dentrix releases, keeping internal stakeholders informed of what's changing in each version
Coordinate with Dentrix Engineering and Product to confirm each release is ready to ship with no surprises for customers
Write and distribute AI-assisted release notes drawn from user stories, features, and epics
Maintain and improve the GitLab CI/CD pipeline so builds, releases, and upgrades are correct and ready to deploy
Write Python scripts for new tests and pipeline changes, using AI tools such as Claude or Cursor to speed up the work
As a Process Modeling Engineer at Lam, you will connect plasma science, process engineering, and predictive modeling to solve complex engineering challenges. Using Lam’s internal physics-based modeling software, you’ll build, calibrate, and validate models that capture how plasma etch and deposition processes shape structures on the wafer.
Compensation
CA San Francisco Bay Area Salary Range for this position: $119,000.00 - $261,000.00.
Responsibilities
Develop physics-based process models and support the creation of virtual twins using Lam’s internal process-modeling software.
Apply expertise in plasma physics and process chemistry to identify root causes, generate actionable insights, and help process engineering teams meet demanding customer requirements.
Partner with process engineers to design studies, collect and model data, analyze results, and communicate findings to stakeholders.
Collaborate with product managers and developers to translate user needs into clear requirements and user stories while ensuring the necessary application capabilities are available.
Support software releases and train new users.
Requirements
Bachelor’s degree in physics, chemistry, chemical engineering, materials science, or a related field
Master’s degree
PhD
Nice to have: Plasma-based deposition and etch chambers operation
Nice to have: Plasma and virtual fabrication simulation tools (SEMulator3D, COMSOL, HPEM, CFD-ACE+, Monte Carlo feature-scale simulators)
Design and optimize custom test circuit architectures for NAND flash memory designs, ensuring manufacturability, reliability, and testability across the semiconductor production lifecycle.
Compensation
The US base salary range that Micron Technology estimates it could pay for this full-time position is: $148,000.00 - $252,000.00 a year
Responsibilities
Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs
Interpret product specifications and test requirements; define circuit functionality, interfaces, operating limits, controllability, observability, and validation criteria
Create, review, and optimize schematics, device sizing, bias structures, sensing and monitoring paths, multiplexers relevant to test circuits
Analyze circuit testability and robustness to ensure compliance with quality, coverage, manufacturability, power, area, and reliability requirements
Drive Design for Test (DFT) requirements for custom NAND test circuits, including controllability and observability, test-mode architecture, fault coverage, built-in self-test and diagnostic access
Requirements
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field
Design and optimize custom test circuit architectures for NAND flash memory, ensuring manufacturability, reliability, and testability across all manufacturing functions.
Compensation
$148,000.00 - $252,000.00 a year
Responsibilities
Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs
Interpret product specifications and test requirements; define circuit functionality, interfaces, operating limits, controllability, observability, and validation criteria
Create, review, and optimize schematics, device sizing, bias structures, sensing and monitoring paths, multiplexers relevant to test circuits
Analyze circuit testability and robustness to ensure compliance with quality, coverage, manufacturability, power, area, and reliability requirements
Drive Design for Test (DFT) requirements for custom NAND test circuits, including controllability and observability, test-mode architecture, fault coverage, built-in self-test and diagnostic access
Requirements
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field
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