Referso Jobs

Principal Mixed-Signal IC Design Engineer

MaxLinear, Inc. · Posted Nov 7, 2024

Open

San Jose, California, United States +7 more
Senior
$164K–$231K per year
9+ years

Principal Mixed-Signal IC Design Engineer

MaxLinear, Inc. · Posted Nov 7, 2024

Open

San Jose, California, United States +7 more
Senior
$164K–$231K per year
9+ years

Senior Staff Engineer Layout and Mask Design

Infineon · Posted Nov 5, 2026

Open

Bucharest, Bucharest, Romania
Senior
8+ years

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Lead analog layout work packages in mixed-signal IC development projects, collaborating with analog design teams across different sites and driving technical excellence throughout the layout development process.

Responsibilities

Lead the overall analog layout work package within development projects, including planning, tracking and technical oversight
Contribute to chip floor planning and area estimation
Interface closely with local and international analog design teams to ensure successful layout development and integration
Develop block and macro layouts through placement and routing of electrical devices according to schematics
Drive the development of analog top layouts for mixed-signal IC circuits, considering conditions related to matching, wire sizing, parasitics and other critical boundary conditions

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering or a related field
Nice to have: automated top-level integration flows

Skills

analog layout mixed-signal IC CAD tools L-Edit

Analog IC Design Engineer

Samsung R&D Institute Israel (SRIL) · Posted Sep 24, 2026

Open

Israel
5+ years

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Analog Engineer responsible for design and development of Analog & Mixed Signal ICs for Samsung CMOS Image Sensors.

Responsibilities

Design and develop Analog & Mixed Signal ICs from proof‑of‑concept to production ramp
Conduct feasibility studies, high‑level design, transistor‑level design & simulation
Perform top‑level simulations, silicon bring‑up, characterization and debugging

Requirements

BSc in Electronic Engineering

Skills

Analog IC design Mixed‑signal IC design ADC design DAC design OpAmp design Comparator design Bandgap design LDO design Charge‑pump design

MTS Design Architect-Custom Layout, HBM

Micron Technology · Posted Nov 4, 2026

Open

Richardson, Texas, United States
On-site
Full-time · Senior
8–12 years

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As an HBM Design Architect-Custom Layout Lead, you will support the development of advanced analog, mixed‑signal, and digital circuits as well as full‑chip integration for next-generation High Bandwidth Memory (HBM) products. This role focuses on physical design and layout.

Responsibilities

Lead end-to-end layout execution of analog, mixed-signal, custom digital blocks and overall chip integration for HBM products.
Own full-chip technical decisions covering analog, digital, memory, ESD, EM/IR and ensure effective performance, power, and area (PPA).
Hands-on experience in layout develop of critical Memory /Analog and mixed-signal blocks such as Array Layout, Decoder, Control logic, IOs, PLLs, ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, and Differential Amplifiers.
Collaborate with HBM architects and circuit designers on floorplanning, placement, routing, and integration strategies.
Support integration of Memory, Logic, and Analog circuits for new HBM product architectures.

Requirements

MS degree
BS degree
Nice to have: DRAM custom layout
Nice to have: AI to accelerate layout development

Skills

analog layout mixed-signal layout custom digital blocks

Analog Layout Engineer

Inabia Software & Consulting Inc. · Posted Nov 4, 2026

Open

Remote, United States
Remote
Contract · Senior
7–12 years
Visa sponsorship

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The Analog Layout Engineer will design physical silicon layout for high-frequency or high-speed mixed-signal circuits using advanced CMOS/FinFET nodes like TSMC 4NM.

Responsibilities

Create block-level and chip-top-level floor plans
Manage hierarchical block integration
Handle micro-bump or package-aware co-design
Address layout-dependent effects (LOD, WPE, LDE)
Device matching

Skills

Analog Layout TSMC 4NM CMOS FinFET SerDes ADCs DACs PLLs DRC LVS TSMC N3 TSMC N5 TSMC N7

Senior Engineer, Analog Layout

Marvell Technology · Posted Nov 4, 2026

Open

Da Nang, Da Nang City, Vietnam
Senior

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Analog Layout Engineer responsible for designing and verifying analog IC layouts using CAD tools and Cadence Virtuoso.

Compensation

Competitive salary, plus 13th-month salary and performance-based bonus

Responsibilities

Design analog IC layout layers from schematics
Run simulations and verifications
Collaborate with designers and global teams
Present design solutions to teams
Iterate designs to meet specifications

Requirements

Bachelor's or Master's in Electrical Engineering

Skills

Analog layout CAD tools Cadence Virtuoso Schematic interpretation Simulation and verification

Benefits

Premium health & accident insurance
Annual medical check-up
15 annual leave days
3 Recharge periods per year
5 paid sick leave days

Staff Analog Engineer

Renesas Electronics · Posted Nov 4, 2026

Open

Bengaluru, Karnataka, India
Full-time · Staff
7+ years

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Technical Lead with 7+ years of experience in Analog and Power IC developpement, responsible for leading IP design for PMICs, voltage regulators, DC-DC converters, and related analog blocks.

Responsibilities

Lead design and integration of analog and power IPs for PMIC products.
Drive resolution of technical challenges, design trade-offs, and performance optimization.
Design complex analog blocks including charge pumps, LDOs, oscillators, ADCs, protection circuits, bandgaps, op-amps, comparators, and level shifters.
Develop and optimize control loops for stability, efficiency, and performance.
Guide analog and power layouts, floor planning, noise isolation, and top-level integration.

Requirements

Bachelor’s or master’s degree in electrical engineering

Skills

Analog Circuit Design PMICs switched-mode power converters power stage design analog layout verification

PMU Analog Layout Designer

Apple · Posted Nov 3, 2026

Open

Austin, Texas, United States +1 more
On-site
3+ years

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Design and deliver high-performance analog layout for PMU IPs and complex chip levels.

Locations (2)

Austin, Texas, United States
Cupertino, California, United States

Responsibilities

Deliver PDV clean layout
Plan and schedule work with circuit design team
Negotiate layout trade-offs
Recognize failure-prone circuit and layout structures
Run design verification tools on Mega-cell and chip level

Requirements

Bachelor's degree in a relevant field
Nice to have: tight matching
Nice to have: low capacitance
Nice to have: low power analog blocks
Nice to have: resistors

Skills

analog layout mixed-signal layout

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