- San Jose, California, United States
- 3+ years
1–4 jobs· newest first
Full-time · Principal

$174K–$195KOn-site · Full-time

Entry
+10K new in the last hour
Design, develop, and test electronic components and systems for semiconductor manufacturing, including ASIC design and verification.
Serve as the primary technical resource for the verification team, leading end-to-end verification of IPs and their integration using best-in-class methodologies.
Work closely with architecture and RTL designers on verifying the functionality correctness of the design. Develop and lead testing plan and test environment.
The base pay range for this role is between $174,149 - $194,700/yr and your base pay will depend on your skills, qualifications, experience, and location.
Junior SoC Verification Engineer responsible for RTL design, IP integration and verification of ultra‑low power chips.
Competitive salary with bonus plan (Short term incentive + Long term incentive)