Design and deliver low‑level simulation and virtualization software for high‑performance automotive systems.
Compensation
The US base salary range for this full-time position is $163,500.00 - $212,400.00.
Responsibilities
Own the end‑to‑end design and delivery of low‑level emulation and virtualization software for high‑performance, high‑throughput ECU simulation across multiple cross‑platform vehicle initiatives
Architect and optimize CPU, GPU, NPU simulation / emulation / virtualization technologies continuously pushing the boundaries of functionality, performance, efficiency, and reliability
Deliver production‑grade simulation components that precisely meet product definitions, customer specifications, and vehicle platform requirements, maintaining full traceability to requirements
Design and implement high‑performance Linux guest drivers and libraries for CPU, GPU, NPU, and peripheral components, enabling seamless virtualized hardware access in a virtualized environment
Partner closely with application and system development, validation, and integration teams to translate real‑world automotive constraints into robust, high‑quality simulation solutions that accelerate vehicle product SW development, validation, and integration
Requirements
BS / MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
Build and optimize low-latency C++ components for market data processing, exchange connectivity, and order execution in a high-performance trading environment.
Compensation
The base compensation range for this role is approximately $100,000-$140,000 contingent on experience. Wolverine Trading's total compensation model includes base salary and an annual discretionary bonus.
Responsibilities
Build and enhance low-latency C++ components for market data processing, exchange connectivity, and order execution.
Develop and optimize connectivity to new markets and exchange platforms.
Analyze and tune system performance at every level from application code and lock-free data structures to network and OS-level behavior.
Collaborate with traders, FPGA engineers, and infrastructure teams to deliver end-to-end solutions across software and hardware.
Own production systems through the full lifecycle: design, implementation, testing, deployment, and real-time support.
Lead the next-generation architecture of market data and execution platforms for systematic trading, focusing on low-latency C++ systems and high performance.
Compensation
base range of $225,000 to $300,000 plus annual discretionary variable remuneration
Responsibilities
Lead the development and global rollout of our Core market data platform used across multiple focus areas (Market data, Research engineering, Pricing, Strategies).
Design and implement high-performance components for market data ingestion, normalization, and distribution, as well as its usage for order execution and strategy infrastructure.
Develop tools and frameworks that enable quants and technical traders to build, tune, and deploy data-driven systematic pricing and trading strategies.
Own the full lifecycle of your components in a fast-paced, iterative environment: deploy, monitor, profile, and optimize your code in production.
Work closely with focus group engineers, quants, and technical traders to refine requirements, collect feedback, and iterate on the platform's design and implementation.
Lead CPU and SoC software architecture for NVIDIA’s high‑performance computing and AI platforms.
Compensation
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are:
272,000 USD – 431,250 USD for Level 6; and 320,000 USD – 488,750 USD for Level 7.
Responsibilities
Collaborate with Hardware and Software Engineers to craft the next generation CPUs and SoCs
Bring a deep understanding of Software Architecture, system software technologies, and modern OSes to drive hardware architecture decisions
Provide direction and advice for designing optimized solutions to various software engineering organizations
Collaborate with key partners to customize solutions to meet their requirements
Research upcoming industry directions for NVIDIA's key markets and provide engagement advice to Sr. Management
Requirements
MS or PhD degree in computer or electrical engineering
Nice to have: deep understanding of processor architectures
Nice to have: background with virtualization technologies
Nice to have: familiarity with CPU and SoC security architecture
Lead cross‑team technical initiatives, drive consensus on architectural designs and implementation strategies, and mentor engineering staff while shaping platform engineering initiatives.
Locations (2)
Montreal, Quebec, Canada
United States
Compensation
Zone A : de 153 000 $ CA à 229 600 $ CA brut
Zone B : de 165 400 $ CA à 248 000 $ CA brut
Zone A : de 157 800 $ US à 236 800 $ US brut
Zone B : de 178 300 $ US à 267 500 $ US brut
Zone C : de 200 400 $ US à 300 600 $ US brut
Midlevel or senior software engineering role focused on C++/Java for a market data platform.
Locations (4)
Boston, Massachusetts, United States
Salt Lake City, Utah, United States
San Francisco, California, United States
New York, New York, United States
Compensation
The base salary range for this role is $150,000–$250,000, benchmarked to Tier 1 locations in each country. Total compensation may also include bonuses, commissions, and equity, depending on the role.
Responsibilities
Own and maintain our Java client library
Design, develop, and maintain high-performance server applications in C/C++
Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing, performing definition, design, verification, and/or documentation for ASIC development.
Responsibilities
Perform definition, design, verification, and/or documentation for ASIC development
Determine architecture design, logic design, and/or system simulation
Define module interfaces/formats for simulation
Contribute to the development of multidimensional designs involving the layout of complex integrated circuits
Evaluate all aspects of the process flow from high-level designs to synthesis, place and route, and timing and power use
Requirements
Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electronics Engineering, Computer Engineering, or related field
Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.
Responsibilities
Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing
Perform definition, design, verification, and/or documentation for ASIC development
Determine architecture design, logic design, and/or system simulation
Define module interfaces/formats for simulation
Contribute to the development of multidimensional designs involving the layout of complex integrated circuits
Requirements
Master’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, Electrical and Computer Engineering, or related field
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