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1–3 jobs· newest first

ASIC Design Verification EngineerNew
Cisco · Yerevan, Armenia
Hybrid · Full-time
ASIC Design Verification EngineerNew
Cisco · Yerevan, Armenia
Hybrid · Full-time
Design for Test Engineer
Apple · Cupertino, US
$208K–$225KOn-site · Full-time

+10K new in the last hour

ASIC Design Verification Engineer

Cisco · Posted Nov 11, 2026

Yerevan, Yerevan, Armenia
Hybrid
Full-time
3+ years

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AI

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Design verification engineer responsible for test planning, testbench development, and debugging for ASIC projects at Cisco’s Yerevan office.

Responsibilities

Drive comprehensive test planning and development of robust test benches
Collaborate closely with design, design‑verification, and physical design teams
Identify and resolve technical issues using advanced debugging tools and scripting skills
Develop and refine verification strategies to ensure optimal coverage and efficiency
Contribute to delivering high‑quality, reliable products

Requirements

Bachelor’s or Master’s Degree in Electrical or Computer Engineering or any related field
Nice to have: UVM
Nice to have: System Verilog

Skills

test planning testbench development System Verilog debugging tools DVE and Verdi scripting languages Tcl Python Perl DVE Verdi Tcl Python Perl

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ASIC Design Verification Engineer

Cisco · Posted Nov 11, 2026

Yerevan, Yerevan, Armenia
Hybrid
Full-time
3+ years

Apply with RefersoAI Apply on careers page

Drive comprehensive test planning and development of robust test benches to support cutting‑edge ASIC projects.

Responsibilities

Drive comprehensive test planning and development of robust test benches to support cutting‑edge ASIC projects.
Collaborate closely with design, design‑verification, and physical design teams to integrate and validate test logic throughout all phases of implementation.
Identify and resolve technical issues by leveraging advanced debugging tools and scripting skills.
Develop and refine verification strategies to ensure optimal coverage and efficiency.
Contribute to delivering high‑quality, reliable products that advance technology and innovation.

Requirements

Bachelor’s or Master’s Degree in Electrical or Computer Engineering or any related field.
Nice to have: UVM
Nice to have: System Verilog
Nice to have: problem‑solving
Nice to have: analytical skills

Skills

System Verilog DVE Verdi Tcl Python

Design for Test Engineer

Apple · Posted Nov 5, 2026

Cupertino, California, United States
On-site
Full-time
$208K–$225K per year
4+ years

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Lead design for test verification activities for Apple hardware projects.

Compensation

base pay range for this role is between $207,673 - $225,300/yr

Responsibilities

Set up and generate collaterals for each project
Conduct document specification review of the design with designer
Conduct scan dump verification first on RTL level for assigned projects
Verify scan dump for all the projects assigned
Conduct emulation level verification for assigned projects

Requirements

Master’s degree in Electrical Engineering or related field

Skills

Bug Triage Resolution Management JIRA Radar Design for Test scan testing waveform analysis Synopsys Verdi

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verification automation

hardware design specification

RTL code analysis

advanced failure triage

Benefits

Comprehensive medical and dental coverage
retirement benefits
discounted products and free services
reimbursement for educational expenses
discretionary stock unit awards

See full job description