Lead the design and optimization of AI inference systems, integrating advanced memory and compute technologies to deliver high-performance, scalable solutions.
Compensation
Salary Range: $275,000
Responsibilities
Develop deep understanding of modern AI inference workloads and system-level behavior
Analyze execution characteristics of LLMs, generative AI, and multimodal inference
Identify bottlenecks in compute, memory, interconnect, and software
Architect software infrastructure for heterogeneous memory and compute resources
Evaluate and contribute to AI software stacks such as PyTorch, CUDA, ROCm, Triton, vLLM
Requirements
Bachelor's or Master's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field; PhD is a plus
Seeking an experienced SAP Profitability and Performance Management (PaPM) Consultant with strong expertise in designing, implementing, and enhancing PaPM solutions to deliver value-driven insights by modeling profitability, performance, and cost allocations.
Responsibilities
Develop, configure, test, implement, and enhance solutions in SAP PaPM
Deliver agreed business requirements, ensuring alignment with finance and performance goals
Design and implement cost and revenue allocation processes and driver-based models
Work on resolving issues, troubleshooting, and proposing innovative solutions
Collaborate with clients and cross-functional teams to gather requirements and translate them into functional and technical specifications
Requirements
Bachelor’s or Master’s degree in Finance, Accounting, Computer Science, or related field
Seeking an experienced SAP Profitability and Performance Management (PaPM) Consultant with strong expertise in designing, implementing, and enhancing PaPM solutions to deliver value-driven insights by modeling profitability, performance, and cost allocations.
Responsibilities
Develop, configure, test, implement, and enhance solutions in SAP PaPM
Deliver agreed business requirements, ensuring alignment with finance and performance goals
Design and implement cost and revenue allocation processes and driver-based models
Work on resolving issues, troubleshooting, and proposing innovative solutions
Collaborate with clients and cross-functional teams to gather requirements and translate them into functional and technical specifications
Requirements
Bachelor’s or Master’s degree in Finance, Accounting, Computer Science, or related field
Lead performance monitoring, analysis, and reporting for standalone Battery Energy Storage Systems (BESS) and solar-plus-storage assets across a distributed generation portfolio.
Responsibilities
Lead performance analysis, monitoring, and operational reporting for standalone BESS and paired solar PV + BESS assets across a distributed generation portfolio.
Develop and monitor key performance indicators, including Round-Trip Efficiency (RTE), State of Health (SOH), State of Charge (SOC), auxiliary power consumption, and system availability.
Develop degradation models and predictive analytics to forecast battery life, monitor SOH against capacity guarantees, and optimize charging and discharging cycles.
Extract, clean, and analyze large-scale SCADA, DAS, telemetry, and discrete-event datasets to identify underperforming assets, diagnose component failures, and recommend corrective actions.
Collaborate with Data Science teams to integrate BESS telemetry into enterprise platforms, optimize data warehousing, and automate internal and external reporting pipelines.
Requirements
Bachelor's or Master's degree in Electrical Engineering
Bachelor's or Master's degree in Computer Science
Bachelor's or Master's degree in Data Science
Bachelor's or Master's degree in Mathematics
Bachelor's or Master's degree in Physics
Skills
iPhone Hardware Systems Engineer - SOC & System Performance
At Apple, people don't just build products. They build the kind of wonder that has reshaped entire industries. The iPhone System Engineering team is looking for an Engineer who is passionate about how iPhone performs.
Responsibilities
Get your hands on real SOC silicon and real iPhone systems: Run hands‑on performance and power measurements with hardware and software tools.
Dig into the data, find the root cause of unexpected behavior, and turn what you learn into clear optimization opportunities.
Architect for the trade‑off: Analyze system behavior across the CPU, GPU, Neural Engine, and memory subsystem.
Weigh power, performance, and thermal constraints against each other, and help decide where the next iPhone SoC and system should invest its power and silicon budget.
Project the future: Build models, analyses, and simulations that project performance for upcoming iPhone products.
Requirements
BS in Electrical Engineering, Computer Engineering, Computer Science
Nice to have: MS/PhD in Electrical Engineering, Computer Engineering, Computer Science
Nice to have: 7+ years of industry experience in performance modeling and/or analysis
Nice to have: deep understanding of CPU, GPU, Neural Engine, and memory
Nice to have: experience architecting trade‑offs among power, performance, and thermal at the SoC or system level
The PyTorch TPU team focuses on enabling efficient and accurate inference of 1P models directly on TPU.
Responsibilities
Develop, evaluate methodologies and systems for running LLM/Multi-modality models cost-effectively on TPU systems.
Analyze and extract insights from traffic pattern to derive computational intrinsics that can be leveraged into actions in system and kernel optimization.
This Senior Design Engineer in the Core Performance Modeling team in Santa Clara, California will contribute using their experience with CPU microarchitecture development, performance modeling, and analysis. Over the medium and longer-term they will have opportunities to expand their technical contributions more deeply into CPU microarchitecture performance simulator development, workload and performance analysis, and model correlation.
Locations (2)
Santa Clara, California, United States
Boxborough, Massachusetts, United States
Responsibilities
Collaborate with a small, dedicated team of hardware and software engineers to optimize the performance of CPU microarchitecture
Expand your experience with cycle-accurate core microarchitecture performance simulator development, workload and trace analysis, microarchitecture development, RTL vs performance model correlation, and so forth
Requirements
Bachelors degree in Computer Science, Electrical and Computer Engineering, or Electrical Engineering preferred
Masters degree in Computer Science, Electrical and Computer Engineering, or Electrical Engineering preferred
JPL Postdoctoral Fellow - Photon Counting Detectors for Space Imaging Systems
AI Inference / Systems Software ArchitectNewNetlist · Irvine, US
Senior Staff CPU Microarchitecture LeadNewGoogle · Mountain View, US+2 more
iPhone Hardware Systems Engineer - SOC & System PerformanceApple · Cupertino, US
Research Scientist Intern, TPU(PhD)Meta · Menlo Park, US
CPU Design Performance EngineerAdvanced Micro Devices, Inc · Santa Clara, US+1 more
JPL Postdoctoral Fellow - Photon Counting Detectors for Space Imaging SystemsJPL/NASA · Pasadena, US