Architect and drive complex pre-silicon verification, including SoC security verification, for Microsoft’s AI accelerators from block to chip and system level through post-silicon validation.
Locations (3)
Redmond, Washington, United States
San Francisco, California, United States
New York City, New York, United States
Compensation
Silicon Engineering IC6 - The typical base pay range for this role across the U.S. is USD $165,600 - $296,400 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $220,800 - $331,200 per year.
Responsibilities
Create complex verification environments and tests, driving pre-silicon functional verification at the block, chip, and system level, reference modeling, and post-silicon validation.
Interact with architects and design engineers to create verification plans covering strategy, test environments and tests, and verification requirements for IP, subsystem, and SoC level verification, then create and drive test plans and test development to provide complete feature coverage.
Senior individual-contributor role providing technical leadership for architecture and development of high-performance silicon and platform subsystems across programmable device portfolio.
Compensation
The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.
Responsibilities
Define system, subsystem, and microarchitecture for complex SoC, ASIC, and FPGA-adjacent platforms, with emphasis on high-performance interconnect, data movement, memory hierarchy, and scalable compute or networking subsystems.
Lead architecture exploration and make technically sound tradeoffs across performance, power, area, bandwidth, latency, reliability, scalability, cost, and schedule.
Develop architectural specifications, performance models, and implementation plans that align requirements across hardware, firmware, software, validation, and product teams.
Own key architecture and design decisions through the full silicon lifecycle: concept, microarchitecture, RTL, integration, verification, emulation, implementation, bring-up, performance debug, and production readiness.
Provide hands-on technical leadership for on-chip networks, routing and arbitration, flow control, cache or memory-coherency mechanisms, memory subsystems, and high-speed interfaces, as applicable to the product roadmap.
This role will contribute to designing the next generation GPU system interface and offers the opportunity to have a real impact in a dynamic, technology-focused company impacting the field of artificial intelligence and product lines ranging from consumer graphics to self-driving cars.
Compensation
The expected base salary ranges for this position are: 124,000 USD – 195,500 USD for Level 2; and 152,000 USD – 241,500 USD for Level 3.
Responsibilities
Understanding how the GPU sub-system modules interoperate and interact with overall system
Architect and plan features in concert with software, hardware, and verification teams across the globe to implement the next iteration of GPUs
Create functional and performance models, often in C++, along with test plans to validate the features you design
Actively support post-silicon validation activities
Defining SoC security architecture and threat models, including secure boot, root of trust, identity, isolation, privilege, debug, lifecycle, and recovery.
Develop verification components such as scoreboards, sequences, constraints, assertions, and functional coverage, along with Makefiles and scripts for scalable and efficient verification.
Develop and implement technical solutions to complex quality and design challenges, and triage and debug testbench, simulation, and emulation failures.
Requirements
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Nice to have: CPU, graphics, or NPU security architecture
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