Semiconductor design jobs

AI Hardware / Memory Systems Architect

Netlist · Posted Nov 12, 2026

Open

Irvine, California, United States
On-site
Full-time · Senior
$285K–$285K per year
10+ years

AI Hardware / Memory Systems Architect

Netlist · Posted Nov 12, 2026

Open

Irvine, California, United States
On-site
Full-time · Senior
$285K–$285K per year
10+ years

Principal Device Engineer (m/f/d) – GaN Power Devices

Nexperia · Posted Nov 13, 2026

Open

Manchester
Principal

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Join Nexperia and drive the development of next-generation GaN power devices. In this senior role, you will provide technical leadership in device concept and system level, simulation, and optimization—translating advanced device physics into high-performance, manufacturable solutions.

Responsibilities

Lead concept phase (device architecture definition) and optimization for GaN technologies
Own performance targets and balance trade-offs across performance, reliability, and manufacturability
Drive TCAD simulation, modeling, and design to support technology and product development
Collaborate with cross-functional teams across process, characterization, reliability, and product engineering
Support industrialization by delivering robust, scalable device concepts

Requirements

MSc/PhD in semiconductor physics, electrical engineering, or related field

Skills

GaN device development Device physics TCAD simulation System level approach Semiconductor design

ASIC Design Engineer

Microchip · Posted Nov 9, 2026

Open

Roseville, California, United States
Full-time · Staff
$91K–$232K per year
12+ years

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Technical Staff Engineer-Design supporting semiconductor architecture, RTL and circuit design, integration, verification, performance, power, area, documentation, and product lifecycle.

Compensation

The annual base salary range for this position, which could be performed in the US, is $91,000 - $232,000.*

Responsibilities

Develop and sustain semiconductor architectures, RTL, circuits, IP, interfaces, subsystems, and design collateral.
Translate product, system, performance, power, area, reliability, test, manufacturing, and schedule needs into design requirements and plans.
Analyze specifications, simulations, timing, power, area, integration, defects, risks, dependencies, and technical tradeoffs.
Debug design, simulation, integration, verification, implementation, and product issues; lead root-cause analysis within approved scope.
Review requirements, architectures, RTL, circuits, models, constraints, results, changes, and release evidence for technical quality.

Requirements

Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, Physics, or a related field
Nice to have: ASIC
Nice to have: SoC
Nice to have: FPGA
Nice to have: analog

Skills

semiconductor design

Design / DFT Director (NVE Engineering)

Micron Technology · Posted Nov 9, 2026

Open

Avezzano, L'Aquila, Italy
On-site
Full-time · Executive
€105K–€183K per year

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Senior leadership role to lead the global DFT strategy, architecture, and execution for advanced NAND Flash products at Micron Semiconductor Italia.

Compensation

The range displayed on each job reflects the minimum and maximum target for hire: 105k-183k EUR per year

Responsibilities

Define and lead the global NAND DFT vision, strategy, and technical roadmap
Own DFT architecture, methodology, integration, verification, coverage closure, and design sign-off
Partner with Design and Project teams to embed testability early and resolve performance, power, area, reliability, cost, and schedule trade-offs
Drive reusable methodologies, automation, and DFT and design-for-debug innovation
Build, develop, and inspire a high-performing global DFT organization

Requirements

M.S. or Ph.D. in Electrical Engineering, Electronics, Computer Engineering, or a related field
Nice to have: NAND Flash
Nice to have: non-volatile memory technologies
Nice to have: memory test algorithms
Nice to have: embedded self-test/diagnostics

Skills

Semiconductor design DFT product test

Design / DFT Director (NVE Engineering)

Micron Technology · Posted Nov 9, 2026

Open

Avezzano, Aquila, Italy
On-site
Full-time · Director

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Seeking an expert and innovative Director of NAND Design for Test (DFT) to lead the global DFT strategy, architecture, and execution for advanced NAND Flash products at Micron Semiconductor Italia.

Responsibilities

Define and lead the global NAND DFT vision, strategy, and technical roadmap across product programs and technology generations.
Own DFT architecture, methodology, integration, verification, coverage closure, and design sign-off from early product definition through tape-out.
Partner with Design and Project teams to embed testability early and resolve performance, power, area, reliability, cost, and schedule trade-offs.
Drive reusable methodologies, automation, and DFT and design-for-debug innovation.
Build, develop, and inspire a high-performing global DFT organization.

Requirements

M.S. or Ph.D. in Electrical Engineering
Electronics
Computer Engineering, or a related field
Nice to have: NAND Flash experience
Nice to have: non-volatile memory technologies

Skills

semiconductor design DFT product test silicon validation

AI Hardware / Memory Systems Architect

AI Hardware / Memory Systems Architect

Compensation

Responsibilities

Requirements

Skills

Principal Device Engineer (m/f/d) – GaN Power Devices

Responsibilities

Requirements

Skills

ASIC Design Engineer

Compensation

Responsibilities

Requirements

Skills

Design / DFT Director (NVE Engineering)

Compensation

Responsibilities

Requirements

Skills

Design / DFT Director (NVE Engineering)

Responsibilities

Requirements

Skills

Benefits

Benefits

Benefits