The Non-Admitted Underwriter is responsible for independently underwriting small to mid-size non-admitted commercial accounts within assigned authority and guidelines.
Compensation
Anticipated Hiring Range: $55,000- $85,500 annual base salary depending on experience, qualifications, and geographic location. $60,000 - $93,000 annual base salary depending on experience, qualifications, and geographic location in CA, CT, MA, NJ, NY, and PA
Responsibilities
Underwrite small to mid-size non-admitted new and renewal accounts by analyzing exposures, loss history, financial condition, controls, inspection findings, product availability, and other available risk information.
Determine appropriate pricing, coverage, terms, conditions, limits, deductibles, and risk improvement expectations within delegated authority and applicable underwriting guidelines.
Exercise individual underwriting authority within assigned parameters; escalate risks outside authority or appetite with timely analysis and a clear recommendation.
Drive corrective action or remediation strategies on renewal accounts when performance, controls, or emerging concerns require action.
Own underwriting quality and performance for assigned accounts or book of business, including growth, pricing, retention, mix, profitability, and service results.
Requirements
Professional designation or continuing insurance education is preferred
Deliver premium-quality silicon designs that push the boundaries of what is possible.
Compensation
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Responsibilities
Deliver premium-quality silicon designs that push the boundaries of what is possible.
Develop cutting-edge custom Intellectual Property (IP) and System-on-Chip (SoC) designs.
Build solutions capable of complex, high-performance functions with exceptional efficiency.
Bring passion, drive, and intellectual curiosity to solving challenging Computer and Electrical Engineering problems.
Serve as an integral member of the digital logic design team developing AI components, with a focus on microarchitecture-based functions and features.
Requirements
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Manage low to moderate complexity commercial claims in Cyber, Technology, Media, and MPL lines, investigating, resolving, and ensuring compliance with company protocols.
Compensation
In District of Columbia, California, Colorado, Connecticut, Illinois, Maryland, Massachusetts, New York and Washington, the national base pay range for this job level is $54,000 to $103,000 annually.
Responsibilities
Investigate and resolve claims according to company protocols and quality standards
Verify policy coverage and establish reserves
Conduct focused investigations to determine compensability and liability
Maintain working relationships with internal and external partners
Authorize and ensure claim disbursements within authority limits
Requirements
Bachelor’s degree or equivalent experience
Juris Doctor (JD) preferred
Nice to have: Juris Doctor (JD)
Nice to have: Chartered Property Casualty Underwriter (CPCU) designation
Nice to have: Experience handling claims or legal matters involving Cyber, Technology, Media, or MPL
Lead verification engineering for custom silicon at Annapurna Labs, ensuring high-speed I/O and system-wide integrity across SoC components.
Compensation
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, CA, Cupertino - 277,400.00 - 350,000.00 USD annually
Responsibilities
Architect and implement end-to-end verification strategies addressing system-wide implications and cross-module interactions
Drive unified verification plans across multiple environments, tools and methodologies
Provide technical leadership for verification efforts, guiding architectural decisions and methodology choices
Own the technical direction and drive resolution of complex verification challenges at sub-system and chip-level, providing hands‑on technical guidance and effective solutions
Guide and mentor team members on best practices, methodology improvements, and technical problem‑solving
Requirements
Bachelor's degree in Electrical Engineering or a related field
Nice to have: verifying at multiple levels of logic from IP blocks to SoCs to full system testing
Provide reimbursement education and day-to-day support to eye care practices, billing teams, administrators, and internal field partners within the assigned territory.
Responsibilities
Provide reimbursement education and day-to-day support to eye care practices, billing teams, administrators, and internal field partners.
Explain approved information related to coding, coverage, documentation, claims submission, payment pathways, and reimbursement processes.
Assist accounts in identifying common reimbursement barriers and appropriate next steps.
Coordinate with internal reimbursement, patient access, customer service, and sales partners to support timely follow-up on account questions and unresolved issues.
Conduct virtual and in-person customer education using company-approved presentations, tools, and materials.
Lead regional payer engagement and coverage strategy for the TearCare® System, building relationships with Medicare, commercial plans, and other payers to advance patient access and coverage policies.
Responsibilities
Develop and execute a regional payer‑relations strategy aligned with Market Access priorities
Prioritize regional payer organizations based on impact and opportunity
Build and maintain professional relationships with payer medical directors, policy leaders, reimbursement teams, and other decisionmakers
Lead compliant payer meetings focused on TearCare clinical evidence, coding, coverage, and payment
Monitor existing and emerging payer coverage policies, medical policies, and reimbursement practices
Requirements
Bachelor’s degree in health policy, healthcare administration, business, life sciences, health economics, public health, or a related field
Verify the design and implementation of cutting‑edge SerDes IPs for NVIDIA’s high‑speed protocols.
Compensation
Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 136,000 USD – 218,500 USD for Level 3; and 168,000 USD – 264,500 USD for Level 4.
Responsibilities
Develop and execute verification plans for SerDes digital designs, golden models, and microarchitecture using SystemVerilog/UVM, simulation, and hardware emulation.
Develop, bring up, and debug SerDes verification environments on Cadence Palladium, including preparing designs and testbenches for emulation and running long‑duration system scenarios.
Write and maintain C/C++ reference models, stimulus generators, checkers, and test code to support simulation and emulation.
Investigate failures across RTL, verification infrastructure, C/C++ models, and RNM models, and collaborate with designers to resolve issues.
Work with architects, digital and analog designers, and pre‑ and post‑silicon verification teams to define verification scope, close coverage, and deliver high‑quality IP on schedule.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering
Bachelor’s or Master’s degree in Computer Science
Bachelor’s or Master’s degree in Computer Engineering
MTS Silicon Design EngineerAdvanced Micro Devices, Inc · Austin, US
Complex Claims Specialist - Cyber, Technology, Media, Fidelity & Miscellaneous Professional LiabilityCNA Insurance · New York, US
Principal Design Verification EngineerAmazon · Cupertino, US
Bilingual Customer Service SupervisorLanding · Mexico City, Mexico