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1–3 jobs· newest first

GPU Design Verification Engineer, Senior
Qualcomm · San Diego, US
$141K–$212KSenior
GPU Design Verification Engineer
Qualcomm · Markham, Canada
GPU Design Verification Engineer
Qualcomm · Santa Clara, US
$136K–$204K

+10K new in the last hour

GPU Design Verification Engineer, Senior

Qualcomm · Posted Nov 9, 2026

San Diego, California, United States
Senior
$141K–$212K per year
2–3 years

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Apply on careers page

Architects, designs, implements, verifies, and optimizes performance and power of GPU cores.

Compensation

$141,300.00 - $211,900.00

Responsibilities

Owning and executing on key independent tasks towards program requirements
Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area
Working within prescribed timeline requirements and resource constraints
Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances
Research through available resources and engagement with various inter-disciplinary teams

Requirements

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field
Nice to have: GPU verification
Nice to have: System verification

Skills

System Verilog UVM Verilog VHDL C/C++Scripting Simulation Debug Constrained random Functional Coverage Design Debug Emulation Platforms FPV DPV Python Make Airflow Visual Studio GNU Toolchain Veloce Palladium Zebu FPGA Protium HAPS qemu

Benefits

Competitive annual discretionary bonus program
Opportunity for annual RSU grants
Highly competitive benefits package

See full job description

GPU Design Verification Engineer

Qualcomm · Posted Nov 4, 2026

Markham, Ontario, Canada
4+ years

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Architects, designs, implements, verifies, and optimizes performance and power of GPU cores.

Compensation

The compensation range will be determined upon the title.

Responsibilities

Owning and executing on key independent tasks towards program requirements
Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.
Working within prescribed timeline requirements and resource constraints
Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances.
Research through available resources and engagement with various inter-disciplinary teams

Requirements

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field
Nice to have: GPU based verification
Nice to have: system or sub-system level verification

Skills

System Verilog UVM

GPU Design Verification Engineer

Qualcomm · Posted Nov 4, 2026

Santa Clara, California, United States
$136K–$204K per year
1+ years

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Architects, designs, implements, verifies, and optimizes performance and power of GPU cores.

Compensation

$135,700.00 - $203,500.00

Responsibilities

Owning and executing on key independent tasks towards program requirements
Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.
Working within prescribed timeline requirements and resource constraints
Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances.
Research through available resources and engagement with various inter-disciplinary teams

Requirements

Bachelor's degree in Computer Engineering
Bachelor's degree in Computer Science
Bachelor's degree in Electrical Engineering
Master's Degree in Electrical Engineering
Master's Degree in Computer Science

Skills

System Verilog UVM Verilog VHDL

Constrained random

Functional Coverage development

Emulation/Prototyping Platforms

Embedded FW Development

Performance Analysis

Linux OS Kernel Architecture

Formal verification

See full job description

Constrained random

Functional Coverage

Emulation platforms

kernel-mode drivers

Benefits

Competitive benefits package
Discretionary annual bonus program
RSU grants

See full job description