Senior Emulation Engineer on the AISiE SoC Design Verification team, developing scalable verification environments for AI accelerators.
Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year.
- Build, validate and automate emulation models with constant improvement in runtime efficiency.
- Collaborate with architects and design engineers to define verification plans, including strategy, test environments, and requirements for IP/Subsystem/SoC-level verification.
- Develop reusable verification components, including monitors, trackers, debug flows, assertions, and functional coverage models.
- Triage and debug failures across testbenches, simulation, and emulation environments.
- Develop Makefiles and automation scripts to enable scalable and efficient verification flows.
- Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Nice to have: Doctorate with 3+ years experience
- Nice to have: Master's with 6+ years experience
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