The HSIO Validation Engineer will own the characterization and qualification of high-speed I/Os—such as PCIe, NVLink, NVLink-C2C, UCIe, USB, UFS, and Ethernet—on brand-new silicon serving datacenter, AI, and client markets.
- Own end-to-end characterization and validation of high-speed IO — PCIe, NVLink, NVLink-C2C, UCIe, USB, UFS, Ethernet — from silicon die through package and board, on NVIDIA GPUs, CPUs, and SoCs.
- Develop and execute validation test plans for silicon and SoC-level HSIO features — bring-up, corner qualification, stress, productization, and structured DOE across PVT, board, cable/connector, thermal, and firmware variables.
- Drive power characterization and optimization across IO interconnects under workload-representative stimuli.
- Drive systematic root-cause analysis for complex HSIO bugs — isolating contributions across silicon, package, board, firmware, and driver.
- Assess manufacturing and yield implications of HSIO margin distributions.
- BS in Electrical Engineering
- MS in Computer Engineering
- Nice to have: PCIe Gen5/Gen6
- Nice to have: NVLink validation
- Nice to have: mixed-signal
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