- Bangalore, India
- 2+ years
Hardware Engineer focused on Static Timing Analysis (STA) and timing optimization for electronic systems.
Responsibilities
- Plan, design, optimize, verify, and test electronic systems
- Conduct STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs
- Perform timing analysis, validation and debug across multiple PVT conditions using PT/Tempus
- Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation
- Evaluate multiple timing methodologies/tools on different designs and technology nodes
Requirements
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
- PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field
- B.Tech or MTech/MS in Electrical/Electronics/Microelectronics/VLSI
- Nice to have: 5-15 years of experience in STA/Timing