Referso Jobs

Verify ASIC design, architecture, golden models and micro-architecture of PCI Express controllers at IP/sub-system levels using UVM
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology
Define verification scope, develop test plans, tests, and verification infrastructure
Collaborate with architects, designers, and pre and post silicon verification teams

Requirements

B.Tech.
M.Tech.
Nice to have: PCI Express Gen3
Nice to have: CXL
Nice to have: Perl

Skills

verification UVM VMM SystemVerilog Verilog PCI Express

Verification Engineer, PCIE

NVIDIA · Posted Nov 6, 2026

Open

Bengaluru, Karnataka, India
Hybrid
Senior
1+ years

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Responsibilities

Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub-system levels using state-of-the-art verification methodologies such as UVM.
Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology.
Expected to understand the design specification and implementation, define the verification scope, develop test plans, tests, and the verification infrastructure and verify the correctness of the design.
Collaborate with architects, designers, and pre and post silicon verification teams to accomplish tasks.

Requirements

B.Tech./ M.Tech or equivalent experience
Nice to have: PCIE protocol Gen3+
Nice to have: CXL
Nice to have: Perl
Nice to have: Python

Skills

verification UVM Verilog SystemVerilog PCI Express

Advanced Embedded Digital Engineer

Honeywell Aerospace · Posted Nov 5, 2026

Open

San Diego, California, United States
$118K–$148K per year
2+ years

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Lead and mentor junior engineers while designing, simulating, and integrating digital components for Honeywell Aerospace radar and Electronic Warfare applications.

Compensation

The annual base salary range for this position is $118,000 - $148,000.

Responsibilities

Architect, simulate, design, develop, support implementation, and integration of digital functions and sub-systems into Honeywell Aerospace products
Perform requirements specification, digital design, firmware design, simulation, design verification, system integration, and transition to production
Translate specifications into digital designs including microcontrollers, FPGAs, DRAM, digital synthesizers, A/Ds, D/As, sensors, switching and linear regulators
Circuit card design including parts selection, schematic entry, and layout oversight
Partition FPGA architectures and develop and simulate VHDL firmware

Requirements

Bachelor’s degree in a technical discipline such as the sciences, technology, engineering or mathematics

Skills

Electronic product design and development All phases of circuit card development from inception through production

Staff Software Engineer, Accelerators Systems Platforms Software Architect

Google · Posted Nov 5, 2026

Open

Sunnyvale, California, United States
On-site
Staff
$207K–$300K per year
8+ years

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Provide technical leadership on high-impact projects, influence and coach a distributed team of engineers, design, develop, test, deploy, maintain, and enhance large-scale software solutions for Google’s accelerator platforms.

Compensation

US: $207000 - $300000 (USD) + 20% bonus target + equity + benefits

Responsibilities

Provide technical leadership on high-impact projects.
Influence and coach a distributed team of engineers.
Design, develop, test, deploy, maintain, and enhance large-scale software solutions.
Serve as a TL, anchoring ownership of key systems software modules that underpin our Accelerators platforms.
Coordinate with the rest of the organization to drive the successful execution of NPI programs.

Requirements

Bachelor's degree or equivalent practical experience
Master’s degree or PhD in Engineering, Computer Science, or a related technical field
Nice to have: data structures and algorithms
Nice to have: technical leadership
Nice to have: cross-functional projects

Skills

software development embedded operating systems firmware design

Electrical Integration Technician

Amentum · Posted Nov 4, 2026

Open

Huntsville, Alabama, United States
On-site
Full-time · Mid
2–6 years

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The position requires expertise in assembly, testing, troubleshooting, and some limited design skill that would be relevant in supporting distributed computing and simulation laboratories, integration tasks and development activities.

Compensation

The compensation range or hourly rate listed for this position is provided as a good-faith estimate of what the company intends to offer for this role at the time this posting was issued.

Responsibilities

Support systems integration functions
Support software/hardware integration troubleshooting and bug-fix activities
Enter or update documentation into appropriate control system
Troubleshoot simulation anomalies
Collaborate with cross-functional teams to ensure products meet performance goals

Requirements

High School diploma or GED
Associate's Degree
Nice to have: NASA quality control policies
Nice to have: computer rack development
Nice to have: systems engineering processes

Skills

electronic hardware assembly test troubleshooting MIL-STD 1553B RS422

PCIe Post-Silicon Validation Engineer - New College Grad 2027

NVIDIA · Posted Nov 3, 2026

Open

Santa Clara, California, United States
Full-time · Entry
$100K–$190K per year

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Compensation

100,000 USD – 166,750 USD for Level 1; and 116,000 USD – 189,750 USD for Level 2.

Responsibilities

Implement design of processor for deep learning, gaming, and dedication computing.
Responsible for validation of features on Silicon using hands-on lab equipment like logic analyzers.
Understand the design and implementation, define the validation scope.
Develop the post-silicon verification infrastructure (Testplans, Tests, Scripts to analyze data).
Implement test/coverage plans and validate correctness of the design.

Requirements

Pursuing or recently completed a BS or MS in EE, ECE, CS or related field, or equivalent experience.
Nice to have: lab equipment
Nice to have: oscilloscopes
Nice to have: logic analyzers

Skills

VCS Debussy GDB PCI Express SATA USB

PCIe Post-Silicon Validation Engineer - New College Grad 2027

NVIDIA · Posted Nov 3, 2026

Open

Santa Clara, California, United States
Entry
$100K–$190K per year

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Validate PCIe and other bus protocols on silicon, develop test infrastructure, and collaborate with ASIC, SW and System teams.

Compensation

Your base salary will be determined based on your location, experience, and other objective job-related factors. The expected base salary ranges for this position are: 100,000 USD – 166,750 USD for Level 1; and 116,000 USD – 189,750 USD for Level 2.

Responsibilities

Implement design validation on silicon using lab equipment
Define validation scope and develop post-silicon verification infrastructure
Implement test/coverage plans and validate correctness of the design
Collaborate multi-functionally with ASIC, SW and System teams

Requirements

BS or MS in EE, ECE, CS or related field

Skills

VCS Debussy GDB PCI Express SATA USB oscilloscopes logic analyzers

FPGA Engineer

Technica Electronics · Posted Nov 2, 2026

Open

Sant Cugat del Vallès, Catalunya, Spain
Hybrid
Full-time · Mid
2–4 years

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FPGA Engineer to design, develop, simulate, and test FPGA modules for automotive connectivity and computing applications.

Responsibilities

Design, develop, simulate, and test FPGA modules for automotive connectivity and computing applications.
Implement FPGA firmware for in-house hardware platforms, focusing on functionality, reliability, maintainability, and scalability.
Participate in the complete FPGA development lifecycle, from requirements and architecture definition through implementation, simulation, integration, and validation.
Work closely with hardware engineers in the development of FPGA-based electronic assemblies, including schematic reviews, component selection, pinout definition, and layout constraints.
Collaborate with hardware, software, and system engineers to integrate and validate FPGA designs within complete products.

Requirements

Bachelor’s or Master’s degree in Electronics Engineering, Telecommunications Engineering, Computer Engineering, or a related technical field.
Nice to have: AMD/Xilinx
Nice to have: Altera/Intel
Nice to have: basic Verilog
Nice to have: basic SystemVerilog

Skills

FPGA design FPGA development

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