Post-layout verification jobs

BS, MS, or PhD in Electrical Engineering or a related field
Nice to have: process monitors
Nice to have: silicon characterization structures
Nice to have: technology development test vehicles
Nice to have: device behavior across process, voltage, temperature, layout conditions

Skills

analog IC design CMOS device operation transistor-level simulation SPICE-based design flows physical design and implementation

Intern - Analog & Mixed Signal Design Engineer

Ametek, Inc. · Posted Nov 5, 2026

Open

Pasadena, California, United States
Internship · Intern

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Support the design and development of mixed signal integrated circuits as an intern in the Analog & Mixed Signal Design Engineer role.

Responsibilities

Participate in all phases of mixed signal IC development, including specification definition, circuit design, silicon bring-up, and validation.
Perform detailed circuit analysis, design, simulation, and verification of mixed-signal and mixed-mode circuits.
Support layout review, post-layout verification, and design-for-test activities.
Assist with laboratory evaluation and characterization of silicon using industry-standard test equipment.
Document design results and clearly communicate findings to the broader design team.

Requirements

B.S. or M.S. in Electrical Engineering
Nice to have: familiarity with mixed signal verification
Nice to have: basic layout concepts
Nice to have: independent work
Nice to have: collaborative team work

Skills

analog circuit fundamentals digital circuit fundamentals mixed-signal circuit fundamentals IC design CAD tools

Analog IC Design Engineer

onsemi · Posted Nov 5, 2026

Open

Cork, Munster, Ireland
8+ years

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Design and develop analog IP for the Treo BCD65 platform, including bandgap references, LDOs, DC–DC regulators, oscillators and PLLs, and support silicon characterisation and production.

Responsibilities

Design and develop analog IP
Simulate across process, voltage and temperature conditions
Collaborate with layout engineers for post-layout verification
Support silicon characterisation and debugging
Document design results

Requirements

Bachelor's in electrical or electronic engineering
Master's in a relevant discipline
Nice to have: AI-assisted analog design
Nice to have: Design-space exploration
Nice to have: Simulation automation

Skills

Analog IC design Bandgap reference design LDO design DC–DC regulator design Oscillator design PLL design Transistor-level circuit design

Experienced Analog IC Designer

onsemi · Posted Nov 5, 2026

Open

Cork, Munster, Ireland
11–15 years

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Lead the design, development, and production of analog IP for the Treo BCD65 platform, including architecture definition, block development, verification, and mentoring of junior engineers.

Responsibilities

Define architectures for power, clock, monitoring and reset IP
Translate product-line requirements into IP specifications and roadmaps
Drive architecture trade-offs across performance, power, area, robustness, testability and integration complexity
Champion reusable IP architectures and interfaces
Communicate architecture proposals, roadmap priorities and technical decisions

Requirements

Bachelor's in electrical or electronic engineering
Master's in a relevant discipline
Nice to have: BCD technologies
Nice to have: scripting
Nice to have: design-flow automation

Skills

bandgap references LDOs DC–DC regulators oscillators PLLs analog circuit fundamentals

Analog Senior or Staff Design Engineer

Micron Technology · Posted Nov 5, 2026

Open

Tokyo, Tokyo, Japan
Senior
2+ years

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Develop, integrate, and optimize custom test circuit architectures for NAND flash memory designs, including transistor-level digital, analog, mixed-signal, monitoring, control, and memory-array interface circuits.

Responsibilities

Interpret product specifications and test requirements; define circuit functionality, interfaces, operating limits, controllability, observability, and validation criteria.
Create, review, and optimize schematics, device sizing, bias structures, sensing and monitoring paths, multiplexers relevant to test circuits.
Analyze circuit testability and robustness to ensure compliance with quality, coverage, manufacturability, power, area, and reliability.
Validate custom test circuits using XA simulation, Verilog simulation, and mixed-signal verification environments.
Collaborate closely with layout teams on matching, parasitic sensitivity, shielding, routing, guard rings, device placement, and layout-dependent effects.

Requirements

Electrical Engineering
Electronics Engineering
Computer Engineering
Nice to have: NAND flash memory architecture
Nice to have: Test modes

Skills

Custom/analog circuit design Mixed-signal design

Senior Analog IC Designer

Teledyne FLIR · Posted Nov 3, 2026

Open

Waterloo, Ontario, Canada
Full-time · Senior
$114K–$152K per year
8+ years

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Join a team developing the analog and mixed-signal circuitry behind advanced CMOS image sensor products, taking challenging circuits from architecture and transistor-level design through layout, verification, silicon bring-up, and production.

Compensation

$114,200.00-$152,300.000

Responsibilities

Architect and design high-performance analog and mixed-signal CMOS circuits.
Develop ADCs, low-noise amplifiers, bias/reference circuits, PLLs, serializers, and data drivers.
Own simulation, verification, layout collaboration, and post-layout validation.
Apply low-noise and high-speed layout techniques.
Lead silicon bring-up, characterization, and hardware debug.

Requirements

Bachelor’s degree in Electrical Engineering
Master’s degree in Electrical Engineering
Bachelor’s degree in Computer Engineering
Master’s degree in Computer Engineering
Bachelor’s degree in Physics

Skills

analog design fundamentals noise stability mismatch device physics

Senior Analog Design Engineer – Power & Clock IP

onsemi · Posted Nov 3, 2026

Open

Allen, Texas, United States
Senior
5+ years

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Develop power management and clocking IP for Treo-based SoCs

Responsibilities

Design, simulate, and verify analog IP including LDOs, DC/DC converters, charge pumps, PLLs, DLLs, and oscillators.
Own analog blocks from specification through silicon validation.
Perform schematic design, layout review, post-layout verification, and corner analysis.
Collaborate with digital, validation, and technology teams during integration and bring-up.
Support lab characterization and post-silicon debugging.

Requirements

Nice to have: Verilog-A/AMS modeling
Nice to have: automotive applications
Nice to have: industrial applications
Nice to have: AI-assisted design

Skills

analog IC design power management circuits clocking circuits SPICE/AMS simulation mixed-signal verification schematic design

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