Physical Design Engineer
Apolis · Chandler, USSenior
Physical Design Engineer
Apple · Texas, US+4 more On-site
Physical Design Engineer
Apple · Texas, US+4 more On-site
Physical Design Engineer
Apple · Texas+4 more On-site
Physical Design Engineer
Apple · US+4 more On-site · Full-time · Senior
Physical Design Engineer
Apple · Texas, US+4 more On-site
Physical Design Engineer
Apple · Texas, US+4 more On-site
Physical Design Engineer
Apple · Texas, US+4 more On-site
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Apolis · Posted Nov 6, 2026
Lead physical design and verification for SOC implementation, including floor‑planning, place & route, timing optimization, power grid analysis, signal integrity, and formal verification.
Handle all aspects of SOC implementation from netlist to final GDS Perform floor‑planning, partitioning, place & route (P&R), timing optimization, scan mode timing, clock tree insertion, and static timing analysis (STA) Conduct power grid analysis, signal integrity analysis, and physical, electrical, and formal verification Debug LVS/DRC issues at chip/block level Work independently and collaborate with cross‑functional teams Bachelor's in Electrical Engineering Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Apple · Posted Nov 5, 2026
Contribute to all phases of physical design of high performance PHY design from RTL to delivery of final GDSII.
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Physical design of high performance PHY design Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Apple · Posted Nov 5, 2026
Physical Design Engineer
Texas, United States California, United States Beaverton, Oregon, United States Melbourne, Florida, United States Waltham, Massachusetts, United States Contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII Bachelor's of Science in Electrical Engineering Nice to have: High PHY Nice to have: SOC designs Nice to have: Physically aware synthesis Nice to have: Basic SoC Architecture
Bachelor's of Science in Electrical Engineering Nice to have: High PHY Nice to have: SOC designs Nice to have: Physically aware synthesis Nice to have: Basic SoC Architecture
Bachelor's of Science in Electrical Engineering Nice to have: deep design experience in high PHY and/or SOC designs Nice to have: knowledge of industry standards and practices in Physical Design Nice to have: deep understanding of scripting languages Nice to have: deep understanding of Physical Design Verification methodology
Work with architecture, CAD, timing and logic design teams
Perform physical designs of outstanding PHY design
Contribute to physical design from RTL to delivery of GDSII Bachelor's of Science in Electrical Engineering Nice to have: high PHY design experience Nice to have: SOC designs
Bachelor's of Science in Electrical Engineering Nice to have: High PHY Nice to have: SOC designs Nice to have: Physically aware synthesis Nice to have: Power user of industry standard Physical Design & Synthesis tools
Bachelor's of Science in Electrical Engineering Nice to have: High PHY and/or SOC designs Nice to have: Physical Design standards and practices Nice to have: Physical Design Verification methodology
Bachelor's of Science in Electrical Engineering Nice to have: High PHY and/or SOC designs Nice to have: Deep Knowledge about industry standards and practices in Physical Design Nice to have: Deep Understanding of scripting languages Nice to have: Solid understanding of Extraction and STA methodology and tools
Physical Design EngineerApple · Texas, US+4 more