Transistor-level design jobs

Senior Analog Design Engineer

Renesas Electronics · Posted Nov 10, 2026

Open

Mainz, Rhineland-Palatinate, Germany
Full-time · Senior
5+ years

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Senior Analog Design Engineer

Renesas Electronics · Posted Nov 10, 2026

Open

Mainz, Rhineland-Palatinate, Germany
Full-time · Senior
5+ years

Apply with Referso

Senior Analog Design Engineer

Renesas Electronics · Posted Nov 10, 2026

Open

Bingen, Baden-Wurttemberg, Germany
Senior
5+ years

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Design and optimize high-performance analog and mixed-signal ICs for automotive and industrial applications.

Responsibilities

Design and optimize analog and mixed-signal circuit blocks such as amplifiers, voltage references, regulators, data converters, and sensor interfaces.
Perform transistor-level design, simulation, and verification across process, voltage, temperature, and reliability conditions.
Drive silicon bring-up, characterization, debugging, and root-cause analysis through technically sound closure.
Contribute to product robustness, yield improvement, and long-term reliability.
Collaborate closely with Layout, Verification, Product, Test, and System Engineering teams.

Requirements

Bachelor's in Electrical Engineering, Microelectronics, Physics, or a related field
Master's in Electrical Engineering, Microelectronics, Physics, or a related field

Skills

Analog design Mixed-signal IC design Transistor-level design Circuit simulation

Engineer, Analog Design Engineering

Analog Devices · Posted Nov 6, 2026

Open

Milan, Italy
Full-time · Entry
€33K–€48K per year
0+ years

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Design and simulate transistor-level analog circuits for industrial applications, collaborate with multidisciplinary teams, and support layout, testing, and documentation.

Compensation

The pay range for this position in Italy, Milan, Assago is €33,110 to €47,945.

Responsibilities

Designing and simulating transistor-level analog circuits, from individual functional blocks to top-level hierarchical integration.
Developing an understanding of semiconductor device operation, limitations, and reliability requirements.
Using and developing behavioral models for chip-level simulations.
Supporting and reviewing analog and top-level IC layout activities.
Contributing to chip floorplanning and package-design activities.

Requirements

Master's degree in Electronic Engineering, Applied Physics - Electronic, or a related technical discipline.

Skills

Analog circuit design Transistor-level design Simulation Cadence IC layout

Analog Design, Staff Engineer 19621

Synopsys · Posted Nov 2, 2026

Open

Full-time · Manager
5–10 years

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Design and develop high-speed IO circuits for next-generation memory interface PHY IPs including DDR, HBM, and UCIe in advanced CMOS, FinFET, and GAA process nodes.

Responsibilities

Design and develop high-speed IO circuits for next-generation memory interface PHY IPs
Execute circuit design tasks from architecture through layout, simulation, and verification with a focus on performance, power, and area optimization
Analyze and solve complex analog design challenges in advanced technology nodes
Collaborate with global cross-functional teams to deliver integrated PHY solutions
Apply ESD and reliability principles to ensure robust circuit design

Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or related field
Nice to have: knowledge of JEDEC memory interface standards (DDR, HBM, LPDDR)
Nice to have: familiarity with signal integrity and power integrity concepts

Skills

analog circuit design high-speed IO design advanced CMOS FinFET

Experienced Analog IC Designer

onsemi · Posted Nov 5, 2026

Open

Cork, Munster, Ireland
11–15 years

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Lead the design, development, and production of analog IP for the Treo BCD65 platform, including architecture definition, block development, verification, and mentoring of junior engineers.

Responsibilities

Define architectures for power, clock, monitoring and reset IP
Translate product-line requirements into IP specifications and roadmaps
Drive architecture trade-offs across performance, power, area, robustness, testability and integration complexity
Champion reusable IP architectures and interfaces
Communicate architecture proposals, roadmap priorities and technical decisions

Requirements

Bachelor's in electrical or electronic engineering
Master's in a relevant discipline
Nice to have: BCD technologies
Nice to have: scripting
Nice to have: design-flow automation

Skills

bandgap references LDOs DC–DC regulators oscillators PLLs analog circuit fundamentals

CPU Physical Design Engineer

RosaicLabs · Posted Oct 5, 2026

Open

Santa Clara, California, United States
Full-time
5+ years

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Design and optimize CPU physical design blocks, including gate-level and transistor-level implementation, timing, power, and area closure.

Responsibilities

Analyze CPU microarchitecture to guide implementation tradeoffs
Develop gate-level design for CPU blocks
Perform transistor-level design for critical-path structures
Drive logic synthesis, floorplanning, power planning, placement, CTS, and routing
Own static timing analysis, signal integrity, IR drop, electromigration analysis, and physical/electrical signoff

Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related field

Skills

CPU microarchitecture pipeline out-of-order execution caches branch prediction interconnect gate-level design

Senior Analog Design Engineer

Senior Analog Design Engineer

Responsibilities

Requirements

Skills

Senior Analog Design Engineer

Responsibilities

Requirements

Skills

Engineer, Analog Design Engineering

Compensation

Responsibilities

Requirements

Skills

Analog Design, Staff Engineer 19621

Responsibilities

Requirements

Skills

Experienced Analog IC Designer

Responsibilities

Requirements

Skills

CPU Physical Design Engineer

Responsibilities

Requirements

Skills

Benefits

Benefits

Benefits