- San Diego, California, United States
Circuit Design Engineer responsible for defining, specifying, and implementing advanced PLL IPs for AMD products.
Responsibilities
- Design complex PLL building blocks including architecture development and transistor level circuit design
- Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timing requirements
- Work closely with mask design engineers to deliver the physical design and define production/bench-level test plans with post-silicon characterization groups
- Lead/mentor junior engineers
Requirements
- Master’s in electrical engineering
- Ph.D. in electrical engineering
- Nice to have: Digital PLL techniques
- Nice to have: TDC
- Nice to have: DSP