Design, architect, and implement high-performance, reliable network communication transports across multiple generations of SmartNICs and hardware platforms to support demanding HPC and ML workloads.
Profile, tune, and optimize network performance end-to-end—from bare-metal hardware up to the application layer—and scale these solutions across business-critical production workloads.
Partner with cross-functional engineering teams to drive technical alignment, foster a culture of shared innovation, and deliver seamless system integrations.
Lead, mentor, and scale a high-performing engineering team, advocating career growth and fostering a positive culture where technical perspectives thrive.
Define and drive the mid-to-long-term technical roadmap for your team, translating high-level business objectives into clear execution plans while balancing technical debt with product velocity.
Requirements
Bachelor’s degree
Nice to have: Master's degree or PhD in Computer Science
Nice to have: experience in complex matrixed organization
The Ads Safety team builds core infrastructure, developer tooling, and automated safety guardrails for the ML/LLM classifier's lifecycle to ensure Google Ads products and networks are safe and compliant.
Write and test product or system development code.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Contribute to existing documentation or educational content and adapt content based on product/program updates and user feedback.
Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.
Requirements
Bachelor’s degree or equivalent practical experience
Master's degree or PhD in Computer Science or a related technical field
Senior Specialist, Electrical Engineering – FPGA/ASIC Hardware Engineer to support architecture, design, development, integration, and testing of next-generation Electronic Safe and Arm Devices (ESADs).
Responsibilities
Develop FPGA designs using Verilog HDL
Perform SystemVerilog-based verification
Support C#-based bare-metal microcontroller development
Analyze technical requirements
Troubleshoot hardware issues
Requirements
Bachelor's degree
Graduate degree
Nice to have: Microsemi FPGA devices
Nice to have: Actel FPGA devices
Nice to have: antifuse and enhanced Flash FPGA architectures
Help build the technology behind the next generation of autonomous aircraft.
Compensation
Pay within range listed + Bonus + Benefits + Equity
Responsibilities
Lead the architecture, design, integration, and production release of electrical systems and subsystems for autonomous aircraft and support equipment.
Own technical decisions across complex architectures involving FPGAs, power management, analog and digital circuitry, servos, microcontrollers, sensors, radios, and embedded systems.
Remain hands‑on with part selection, schematic capture, simulation, analysis, verification, debugging, design reviews, and production support.
Lead and develop a team of electrical engineers through technical mentorship, coaching, performance feedback, and effective delegation.
Establish technical direction, priorities, and development plans for your team in alignment with program and aircraft objectives.
The base salary range is $161,000 - $182,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.
Responsibilities
Train model for quantization and pruning
Understand how backpropagation of training
Verify models for accuracy
Modify pytorch code to model Ambarella SoC
Create scripts and utilities for data preprocessing, model training, validation and inference
Requirements
BS in Computer Science, Electrical Engineering, or a related field
Nice to have: MS in Computer Science or related fields
Nice to have: industry experience in related field
Nice to have: compression techniques like QAT, pruning
Nice to have: containerization techniques like docker
Senior Hardware Engineer responsible for designing, verifying, and maintaining hardware solutions across the product development lifecycle.
Responsibilities
Help turn system and product requirements into clear hardware specifications
Explore technical possibilities through pre-studies, propose hardware architectures and select key components
Design and implement hardware solutions, contributing as a hardware engineer and, on some projects, as hardware project manager
Plan and carry out hardware verification at functional-block, product and system levels, and document findings in verification specifications and reports
Document design solutions, review colleagues’ designs, arrange reviews of your own work and participate in type-approval testing
Lead server and rack-level production projects for large-scale AI datacenter infrastructure, coordinating capacity planning, procurement, ODM manufacturing, logistics, and deployment teams.
Responsibilities
Align server and rack requirements with capacity planning and datacenter architecture teams
Translate project demand into hardware inputs for procurement and ODM production
Decompose required key parts and validate component compatibility
Place and track production orders with ODM partners
Manage a portfolio of production projects across multiple vendors
Executive-level role leading the end-to-end design, deployment, and operational scaling of high-capacity terrestrial and ground networking architecture for satellite communications.
Lead technical direction for Storage Platform Engineering, focusing on GDC AI storage, features, and management within the GDC ecosystem.
Define, measure, and optimize storage performance to meet stringent IOPS, throughput, and latency requirements using tools like fio for comprehensive benchmarking.
Build and enhance observability, monitoring, alerting, and automated remediation capabilities to ensure high availability and smooth operation of file and block storage components.
Implement secure, isolated storage environments for multiple tenants using ONTAP Storage Virtual Machines (SVMs), Role-Based Access Control (RBAC), and Storage Grid.
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