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1–10 jobs· newest first

Data Center TechnicianNew
CoreWeave · Sandusky, US
$65K–$85KOn-site · Full-time
Machine Learning, Recommendation Systems (Ads Infra and Ranking)New
Meta · Bellevue, US
On-site · Full-time · Senior
Engineer, FPGA Design EngineerNew
Analog Devices (ADI) · Cluj-Napoca, Romania
On-site · Full-time · Entry
Specialist II-IC Quality AssuranceNew
BMO Capital Markets · Tempe, US
$55K–$129KFull-time
Batch Operations Technician -- GMI Operator -New
My3Tech Inc · Raleigh, US
Batch Operations Technician
Crescens Inc. · Raleigh, US
On-site · Contract · Entry
EW Technique Development & Test Engineer
Johns Hopkins Applied Physics Laboratory · Lexington Park, US
$100K–$245K
Principal FPGA Design Engineer
Advanced Micro Devices, Inc · Santa Clara, US
Full-time · Senior
Analyst, Equity Investment Services
Fidelity Investments · Boston, US
$80K–$153KFull-time
Staff ASIC Design Engineer
Nokia · US
Staff

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+10K new in the last hour

Data Center Technician

CoreWeave · Posted Nov 9, 2026

Sandusky, Ohio, United States
On-site
Full-time
$65K–$85K per year

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Data Center Technician responsible for building, maintaining, and operating infrastructure that powers the cloud.

Compensation

The base salary range for this role is $65.000 to $85,000. The starting salary will be determined by job-related knowledge, skills, experience, and the market location. In addition to base salary, our total rewards package includes a discretionary bonus, equity awards, and a comprehensive benefits program (all based on eligibility).

Responsibilities

Assemble, rack, stack, and maintain data center server, storage, and networking hardware
Maintain hot/cold aisle containment, conduct inventory audits, and perform routine physical maintenance
Conduct hardware and network diagnostics on live and offline systems
Troubleshoot issues reported through tickets, replace components, and perform physical repairs
Support equipment installations, device provisioning, and operating system installations

Requirements

Associate’s degree, bachelor’s degree, or equivalent practical experience in Computer Science, Information Technology, Computer Networking, or a related field
Nice to have: Associate’s degree, bachelor’s degree, or equivalent practical experience in Computer Science, Information Technology, Computer Networking, or a related field
Nice to have: Hands‑on experience in enterprise or commercial data center environments
Nice to have: Experience with Linux OS administration, command‑line tools, and device provisioning
Nice to have: Scripting and automation experience with Python, Bash, or shell scripts

Skills

Hardware assembly Hardware installation Hardware troubleshooting Linux operating systems Fundamental networking concepts Cisco IOS Juniper Junos Python scripting Bash scripting Shell scripts Linux Python Bash

Benefits

Medical, dental, and vision insurance - 100% paid for by CoreWeave
Company-paid Life Insurance
Voluntary supplemental life insurance
Short and long-term disability insurance
Flexible Spending Account

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Machine Learning, Recommendation Systems (Ads Infra and Ranking)

Meta · Posted Nov 10, 2026

Bellevue, Washington, United States
On-site
Full-time · Senior
6+ years

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ML Software Engineer building production recommendation systems for Meta Ads Infra and Ranking

Responsibilities

Own a significant area of the ads ranking stack end to end
Lead architecture work in deep learning for recommendations
Define evaluation methodology and guardrails
Drive value-model and auction-adjacent modeling work
Lead GPU-scale training and serving efficiency work

Requirements

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
Master's degree or PhD in Computer Science or another ML-related field
Nice to have: Machine learning
Nice to have: recommendation systems
Nice to have: llms

Skills

Python Javascript Hack C/C++Java Perl PHP shell scripts CUDA Triton distributed training large-scale low-latency model serving GPU scaling model/system co-design privacy-preserving or aggregated measurement delayed-conversion modeling

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Engineer, FPGA Design Engineer

Analog Devices (ADI) · Posted Nov 9, 2026

Cluj-Napoca, Decembe, Romania
On-site
Full-time · Entry

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The FPGA Design Engineer is responsible for developing embedded digital designs interfacing our products targeted on various FPGA devices. The role involves definition, development, implementation, and documentation of designs, well as supporting hardware/software teams in system testing, bring-up and debug.

Responsibilities

Implement FPGA designs targeting ADI’s converter technology
Develop HDL designs on commonly available FPGA evaluation platforms, demonstration systems
Support the hardware and software teams in system level definition, testing, debugging, and troubleshooting
Develop design documentation, application notes, How-To guides, and technical articles
Provide customer support through the ADI Engineer Zone forum, assist in technical training for field personnel and customers

Requirements

BS degree in EE
MS degree in EE
BS degree in ECE
MS degree in ECE

Skills

Digital design (VHDL/Verilog)hardware, HDL and software debugging/troubleshooting embedded systems ARM Microblaze NIOS Linux bare-metal Xilinx/Altera/Lattice devices analog, linear and mixed-signal circuit fundamentals oscilloscopes spectrum analyzers network analyzers signal generators multimeters Perl Tcl shell scripts VHDL Verilog Xilinx Altera Lattice

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Specialist II-IC Quality Assurance

BMO Capital Markets · Posted Nov 9, 2026

Tempe, Arizona, United States
Full-time
$55K–$129K per year
2+ years

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Ensure quality of technology products by designing, executing, and maintaining test plans for ETL processes and data warehouses.

Compensation

The salary for this specific position in Tempe, AZ is $129,290.10 per year. Salary: $55,000.00 - $120,000.00

Responsibilities

Record and document testing results
Design, develop, execute, and maintain test plans and strategies for ETL processes
Load data from source systems to target data warehouse, data mart and reporting systems
Develop detailed test cases, scenarios, and scripts tailored for finance and compliance data
Perform extensive data validation to verify data transformations, aggregations and calculations

Requirements

Bachelor's degree in Computer Science, Computer Engineering, Information Systems or related field
Master's degree in Computer Science, Computer Engineering, Information Systems or related field

Skills

SQL ETL data profiling data cleansing data reconciliation Informatica IDQ Informatica Netezza OBIEE Tableau Shell scripts Pandas Python HP ALM/Quality Center JIRA Agile test plan test automation test scripts SQL Developer TOAD Oracle Teradata MS SQL Server

Benefits

health insurance
tuition reimbursement
accident and life insurance
retirement savings plans

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Batch Operations Technician -- GMI Operator -

My3Tech Inc · Posted Nov 8, 2026

Raleigh, North Carolina, United States
5+ years

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The role involves providing production operations support by monitoring batch processes, verifying results, and performing initial analysis on data interface exceptions.

Responsibilities

Providing production operations support by executing and monitoring batch process
Verifying batch results and supporting nightly production environments across multiple servers
Performing first level analysis of all data interface processing exceptions, logs
Escalating unresolved issues and problems according to defined on-call support procedures
Resolving errors and escalating issues by working with functional teams

Skills

GMI Operator batch operations job scheduling monitoring tools Unix Mainframe Windows relational database SQL programming shell scripts

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C

Batch Operations Technician

Crescens Inc. · Posted Nov 6, 2026

Raleigh, North Carolina, United States
On-site
Contract · Entry

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Support day-to-day batch operation tasks and deliverables related to enterprise batch processing within the NC FAST system's batch architecture.

Responsibilities

Providing production operations support by executing and monitoring batch process
Verifying batch results and supporting nightly production environments across multiple servers
Performing first level analysis of all data interface processing exceptions, logs
Escalating unresolved issues and problems according to defined on-call support procedures
Resolving errors and escalating issues when necessary by working with functional teams to ensure timely analysis and resolution, in alignment with application service level objectives

Skills

GMI Operator and Support specialist batch operations job scheduling and monitoring tools Unix Mainframe Windows relational database skills Basic SQL programming shell scripts

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EW Technique Development & Test Engineer

Johns Hopkins Applied Physics Laboratory · Posted Nov 6, 2026

Lexington Park, Maryland, United States
$100K–$245K per year
5+ years

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Develop, integrate, and assess prototype EW techniques for next-generation electronic warfare systems.

Compensation

$100,000 Annually Maximum Rate $245,000 Annually

Responsibilities

Develop EW techniques, integrate prototype hardware and software capabilities, test novel concepts, and evaluate performance/effectiveness.
Design, conduct, and analyze laboratory tests and demonstrations to characterize EW technique and system performance.
Build and maintain RF budgets and conduct basic size, weight, and power (SWaP) analyses.
Communicate technical findings, test results, and recommendations to sponsors and APL staff.

Requirements

Bachelor’s degree in engineering with a concentration in signal processing, embedded software, FPGA design, RF design, or a related discipline.
Nice to have: Master’s degree or Ph.D. in electrical engineering, computer engineering, or a related discipline.
Nice to have: Ten years of experience in EW technique development, RF test and integration, or related RF systems engineering.
Nice to have: Experience with FPGA design, particularly Xilinx Vivado and Vitis.
Nice to have: Experience developing and testing EW systems.

Skills

C++MATLAB Python RF test equipment SWaP analysis FPGA design Xilinx Vivado Vitis Git/GitLab Java Linux shell scripts

Benefits

Robust education assistance program
Unparalleled retirement contributions
Health insurance
Dental insurance
Vision insurance

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Principal FPGA Design Engineer

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Santa Clara, California, United States
Full-time · Senior
12+ years

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Lead FPGA system design and integration for AMD networking products

Responsibilities

Lead full design lifecycle of FPGA-based networking products
Define FPGA microarchitecture and design specifications
Develop and verify Verilog/SystemVerilog RTL
Implement FPGA flow including synthesis, place and route, timing closure
Integrate hardware, software, and diagnostic teams for rapid bring-up

Requirements

Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or related field

Skills

FPGA design Verilog SystemVerilog Vivado Vitis Lattice toolchains PCIe I2C MDIO QSPI Ethernet USB LPTI AXI Timing closure Floorplanning CDC analysis Pipelining Area/performance optimization Python Tcl Shell scripts

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Analyst, Equity Investment Services

Fidelity Investments · Posted Nov 6, 2026

Boston, Massachusetts, United States
Full-time
$80K–$153K per year
2–4 years

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Analyst on the Equity Investment Services team, developing analytics and insights to support management decision-making across the Equity organization.

Compensation

The base salary range for this position is $80,000-$153,000 per year.

Responsibilities

Build analytics and insights in support of Equity’s strategic initiatives and business priorities
Develop and implement reporting and analytics workflows, including AI-enabled solutions, to support and scale across the Equity platform
Develop and deliver periodic and ad-hoc analytics and insights that enable management’s data-driven decision-making
Support management adoption of trusted data and analytics, including self-service capabilities alongside standard reports
Partner with Equity, QRI, Investment Services, Technology, and other business teams to define requirements and deliver on Equity initiatives

Requirements

Bachelor’s Degree required

Skills

Python SQL AI productivity tools Linux Shell Scripts GitHub Microsoft Copilot ChatGPT Gemini

Benefits

comprehensive health care coverage
emotional well-being support
market-leading retirement
generous paid time off
parental leave

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Staff ASIC Design Engineer

Nokia · Posted Nov 6, 2026

United States
Staff
5+ years

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Senior/Staff High-Speed Analog IC Design R&D Engineer creating innovative products in a fast-paced, collaborative team environment.

Responsibilities

Develop >100Gbaud ICs for future generation products
In charge of many aspects of IC product development such as design, layout, and bring-up
Work closely with verification, CAD, product and test engineering teams to devise and conduct DVT plans and characterization

Requirements

BS 5+ years – MS/PhD preferred
MS 3+ years
PhD

Skills

High-speed analog IC designs SiGe BiCMOS or CMOS Transmission lines High-frequency passive structures Device physics RF wafer probing Lab equipment VerilogA CAD scripting languages Python Shell scripts

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