- San Diego, California, United States
- On-site
- Full-time · Mid
- $157K–$214K per year
- 3+ years
FE Engineer role focused on microarchitecture definition, RTL design, IP integration, and verification in San Diego.
Compensation
The base pay range for this role is between $156,156 - $214,300/yr
Responsibilities
- Microarchitecture definition
- RTL design in SystemVerilog/Verilog
- IP integration and verification
- RTL low-power design and running tool for RTL power analysis
- Running tools to ensure lint-free and CDC clean design
Requirements
- Master's degree or foreign equivalent in Electrical Engineering, Electronics Engineering, Communication Engineering, or a related field