AMD is looking for a strategic software engineering lead who is passionate about improving the performance of key applications and benchmarks. You will be a member of a core team of incredibly talented industry specialists and will work with the very latest hardware and software technology.
Responsibilities
Work with AMD’s architecture specialists to improve future products
Apply a data minded approach to target optimization efforts
Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture
Design and develop new groundbreaking AMD technologies
Participating in new ASIC and hardware bring ups
Requirements
Bachelor’s or Master's degree in Computer Science
Bachelor’s or Master's degree in Computer Engineering
Bachelor’s or Master's degree in Electrical Engineering
Build the heart of Halo: Reliable connectivity, multi-link bonding data plane that fuses cellular, satellite, and RF links into one resilient connection.
Responsibilities
Lead network-related initiatives and serve as the primary technical authority in this domain
Lead Code review, architecture and design activities
Design and build robust, high-performance backend services using Python
Develop, and continuously improve back-end systems in cloud environments (AWS)
Troubleshoot complex network issues and implement performance improvements
Own the full verification life-cycle from verification planning and test execution, emphasizing AI/ML performance and accuracy goals on TPU hardware.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology.
Verify designs with SystemVerilog Assertions and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science
Nice to have: Artificial Intelligence/Machine Learning (AI/ML) accelerators
Senior FPGA Engineer responsible for design, implementation, verification, and optimization of FPGA and SoC-based solutions for high-performance networking, video, and professional media applications.
Responsibilities
Design, implement, and optimize FPGA RTL using Verilog and SystemVerilog.
Translate system and product requirements into FPGA architectures, interfaces, and detailed implementation plans.
Own FPGA features and subsystems from requirements through RTL design, verification, timing closure, hardware bring-up, and system integration.
Leverage AI-assisted engineering tools to accelerate development, verification, debugging, and documentation.
Design high-throughput, low-latency datapaths for networking, video, and streaming applications.
Requirements
Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field.
Lead the architecture, design, and development of cloud-native 5G Packet Core network functions and guide engineering teams in delivering scalable, high-performance carrier‑grade solutions.
Responsibilities
Lead the architecture, design, and development of cloud‑native 5G Packet Core network functions.
Drive end‑to‑end software development using microservices architecture and modern software engineering practices.
Lead technical discussions, design reviews, code reviews, and architecture decisions.
Collaborate with system architects, product management, QA, DevOps, and integration teams to deliver high‑quality releases.
Design highly scalable, resilient, and fault‑tolerant distributed systems.
Requirements
Bachelor's or master's degree in computer science, Electronics, Telecommunications, or related field.
Develop custom silicon solutions powering Google's direct-to-consumer products, contributing to the innovation behind products loved by millions worldwide.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology
Verify designs with SystemVerilog Assertions and industry leading formal tools
Identify and write all types of coverage measures for stimulus and corner-cases
Debug tests with design engineers to deliver functionally correct design blocks
Lead the development of next-generation AI-native methodologies for silicon architecture, RTL generation, verification automation, and design optimization, driving innovation across AMD networking and infrastructure programs.
Responsibilities
Define and lead AI-assisted methodologies for generating synthesizable RTL from high-level architectural specifications and programmable packet-processing pipelines.
Develop automated techniques to optimize pipeline organization, lookup structures, memories, and datapaths for power, performance, area, and cost.
Drive AI-assisted hardware architecture exploration, implementation, and design optimization.
Lead automated verification generation, including reference models, testbenches, assertions, coverage plans, and regression environments.
Establish methodologies to prove functional equivalence between programmable and generated implementations using simulation, formal verification, and differential testing.
Requirements
PhD or equivalent industry experience in Computer Engineering, Electrical Engineering, Computer Science, or a related field
Nice to have: AI-assisted engineering methodologies
Lead design, development, and security of next‑generation network operating system software for enterprise, cloud, AI, and data center environments.
Locations (2)
Chennai, Tamil Nadu, India
Bangalore, Tamil Nadu, India
Responsibilities
Design and develop security features and architecture for SONiC and Linux‑based network operating systems across routing, switching, EVPN‑VXLAN, and AI fabric deployment.
Drive certificate‑based security technologies, platform security initiatives, including secure boot, firmware validation, container security, and hardware root‑of‑trust architectures.
Drive Secure Development Lifecycle (SDL) practices, including threat modeling, secure design, and security code reviews and develop security automation and compliance solutions using modern APIs, YANG models, and CI/CD pipelines.
Partner with product security, architecture, platform, and quality engineering teams to identify and mitigate risks.
Drive complex debugging, root‑cause analysis, and security investigations, partnering with cross‑functional teams to identify and mitigate risks.
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