1–3 jobs· newest first
$163K–$236KOn-site
$220K–$220KSenior
$208K–$225KOn-site
+10K new in the last hour
Design and develop microarchitecture and RTL for Google’s TPU hardware acceleration platform.
US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
The Senior System Power Architect drives power analysis and low-power optimization across Lattice FPGA hardware and software.
Base Pay Range 220,000.00 In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.
Model power dissipation and power delivery for Apple’s silicon and IPs, establish voltage-frequency design points, and collaborate with technology, validation, and product engineering teams.
base pay range for this role is between $207,673 - $225,300/yr