- San Jose, California, United States +1 more
- Full-time · Senior
- $216K–$252K per year
- 2+ years
1–3 jobs· newest first
$216K–$252KFull-time · Senior
Senior

Full-time · Senior
+10K new in the last hour
Lead verification of pixel pipe subsystems and develop complex SystemVerilog and UVM test benches for high-performance computing devices.
base pay range for this role is between $216,091.00-$251,760.00
Design and develop FPGAs, digital ASICs, and/or mixed-signal ASICs for Blue Origin’s Silicon Systems Development team.
Lead design verification for ASIC and embedded IPs, creating UVM-based test benches and verification methodologies.