- Remote, United States
- Remote
- Full-time · Senior
- $190K–$285K per year
- 10+ years
Lead verification of custom silicon designs for high‑power satellites
Compensation
Base salary range for this role is $190,000 – $285,000 + equity in the company
Responsibilities
- Develop and execute verification plans for block‑level, subsystem‑level, and full‑chip environments
- Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models
- Write SystemVerilog Assertions (SVA) and integrate formal verification
- Drive constrained‑random and directed testing strategies
- Run simulations, triage failures, drive root‑cause analysis
Requirements
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
- Nice to have: low power verification
- Nice to have: analog behavioral models
- Nice to have: physical design flows
- Nice to have: cross‑functional geographically distributed teams