Referso Jobs

Sr. Staff Physical Design Engineer

Advanced Micro Devices, Inc · Posted Nov 9, 2026

Open

Austin, Texas, United States +1 more
Senior

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Sr. Staff Physical Design Engineer

Advanced Micro Devices, Inc · Posted Nov 9, 2026

Open

Austin, Texas, United States +1 more
Senior

Apply with RefersoAI Apply on careers page

Mixed Signal Custom Layout - Temporary/Seasonal

Advanced Micro Devices, Inc · Posted Nov 6, 2026

Open

Markham, Ontario, Canada
Temporary

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The full custom IC layout group is looking for a candidate to design the layout for digital and analog circuits based on schematics using industry leading CAD tools and cutting edge foundry technology.

Responsibilities

Create clean, robust layouts for digital and analog building blocks at the transistor level in Cadence Virtuoso.
Floorplan, route, and assemble lower-level cells into macros
Build black-box/abstract models and views consumed by other teams; contribute to tapeout collateral for custom blocks.
Run hierarchical checks at cell/macro levels (DRC, LVS, ERC, EM/IR, Latch-up/ESD) and iterate to closure in partnership with circuit owners.
Explore and leverage AI-assisted tools and workflows to improve layout productivity, verification efficiency, and design quality.

Requirements

Electrical Engineering Degree
Mechanical Engineering Degree
Electronics related Diploma
Nice to have: CMOS device/circuit theory
Nice to have: analog/digital layout best practices

Skills

Digital circuit layout Analog circuit layout Cadence Virtuoso DRC

Physical Design Engineer

Baya Systems · Posted Oct 14, 2025

Open

Bengaluru, Karnataka, India
Senior

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Lead physical design and implementation for high-performance semiconductor IP.

Compensation

Salary commensurate with experience Performance incentives Equity

Responsibilities

Own RTL to GDS physical implementation flows for synthesis, floor-planning, place and route, clock tree synthesis, timing & power closure, EM/IR, PDV and final PD sign off
Own physical design & implementation of high-performance designs from block level to system level components
Deep collaboration with Micro-architects to explore performance, power and area trade-offs for high performance and low power designs
Physical implementation feasibility studies and design recommendations for best PPA
Develop methodologies and recipes for various stages of physical implementation

Requirements

BS in Electrical Engineering
MS in Electrical Engineering
BS in Computer Engineering
MS in Computer Engineering

Skills

physical design synthesis floor planning place and route

Staff Engineer, ASIC Analog Design – AI/CAD

Micron Technology · Posted Nov 4, 2026

Open

Minneapolis, Minnesota, United States
Full-time · Mid
$150K–$256K per year
6+ years

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ASIC Analog Design Engineer on Micron’s ASIC design team, focused on supporting the AI and Virtuoso design environment, shaping ASICs used in Micron's tester and controller IP.

Compensation

$150,000.00 - $256,000.00 a year

Responsibilities

Be part of a highly skilled, high-speed PHY design team working on deep sub-micron technology nodes.
Flex between environment maintenance, flow development, and traditional schematic/layout designer roles as required by group needs.
Support enhancements and resolve bugs in the analog environment for both front-end and back-end tools and flows.
Maintain knowledge graph, graphRAG, or other information sources to improve effectiveness of AI agents.
Explore new ways of working to improve efficiency and quality of designs.

Requirements

B.S. in Electrical Engineering
M.S. in Electrical Engineering
Ph.D. in Electrical Engineering
Nice to have: generative AI principles
Nice to have: Virtuoso analog design tools

Skills

ASIC analog design deep sub-micron design high-speed PHY design

Staff Engineer, ASIC Analog Design – AI/CAD

Micron Technology · Posted Nov 4, 2026

Open

Minneapolis, Minnesota, United States
Full-time · Mid
$150K–$256K per year
6+ years

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ASIC Analog Design Engineer on Micron’s ASIC design team, focused on supporting the AI and Virtuoso design environment.

Compensation

$150,000.00 - $256,000.00 a year

Responsibilities

Be part of a highly skilled, high-speed PHY design team working on deep sub-micron technology nodes.
Flex between environment maintenance, flow development, and traditional schematic/layout designer roles as required by group needs.
Support enhancements and resolve bugs in the analog environment for both front-end and back-end tools and flows.
Maintain knowledge graph, graphRAG, or other information sources to improve effectiveness of AI agents.
Explore new ways of working to improve efficiency and quality of designs.

Requirements

B.S. in Electrical Engineering
M.S. in Electrical Engineering
Ph.D. in Electrical Engineering
Nice to have: generative AI principles
Nice to have: Virtuoso analog design tools

Skills

ASIC analog design deep sub-micron technology high-speed PHY design

Sr. Staff Physical Design Engineer

Sr. Staff Physical Design Engineer

Locations (2)

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Mixed Signal Custom Layout - Temporary/Seasonal

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Physical Design Engineer

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Staff Engineer, ASIC Analog Design – AI/CAD

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Staff Engineer, ASIC Analog Design – AI/CAD

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EM/IR jobs

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