Responsible for product testing at wafer and package level for semiconductor devices, developing and optimizing ATE test programs, and collaborating with cross-functional teams to ensure test quality and efficiency.
Responsibilities
Perform product testing at wafer and package level
Sr Principal Signal Integrity Engineer responsible for improving SI/PI performance, production design analysis, measurement, and characterizing for high-speed interconnects.
Responsibilities
Perform signal and power integrity analysis for high-speed interconnects (PCB, package, MLO, probe card).
Develop and validate electrical models for Transmission lines, vias, connectors, and PDN (Power Distribution Network) structure.
Define stack-ups, impedance targets, and routing constraints.
Evaluate and optimize Reflections, insertion/return loss, and Crosstalk and jitter performance.
Use EM and circuit tools (e.g., HFSS, ADS, SIwave, PowerSI) for Frequency-domain and time-domain analysis.
Requirements
BS/MS in Electrical Engineering (or related field)
Senior/Lead VLSI Design Engineer responsible for architecting and optimizing global circuit areas including custom clocking, low-power design, and power distribution integrity for SambaNova’s AI accelerators.
Compensation
$210,000—$280,000 USD
Responsibilities
Architect, design, and perform transistor level circuit design and optimization of custom ultra-low-jitter, low-skew chip-level clock distribution networks
Perform comprehensive signal integrity, power integrity, jitter, skew, and EM/IR analyses across all chip-level clock distribution networks
Involved in low-power design methodology and power analysis of key components
Collaborate closely with Physical Design teams on floor-planning, custom routing, shielding strategies, and Clock Tree Synthesis guidelines
Partner with IP teams to select, evaluate, and integrate custom IO pads, level translators, primary/secondary ESD clamps, and rail protection structures
Requirements
Bachelor’s or Master’s degree in Electrical Engineering or Microelectronics
An Electrical Engineering Intern at Collins Aerospace/RTX will design and develop digital hardware for high performance communication products used in defense applications.
Compensation
The salary range for this role is 37,000 USD - 82,000 USD.
Responsibilities
Perform circuit card design lifecycle activities including requirements capture, schematic capture, design documentation, signal integrity analysis, PCB stackup and routing instructions, coordination and review of printed wiring board layout, creation of test plans, and root cause analysis.
Create and analyze electrical schematics.
Select components necessary to implement the design requirements.
Perform test and troubleshooting of electronic circuitry.
Assist with digital hardware factory and field failure root cause analysis.
Requirements
Bachelor’s or Advanced degree in Electrical Engineering or related STEM field
Nice to have: Experience with microprocessor/microcontroller, DSP, FPGA, ADC, DAC
Nice to have: Lab equipment usage (oscilloscopes, analyzers)
Nice to have: Knowledge of digital circuit design parameters
Lead the design and development of advanced networking and wireless hardware products across the full hardware lifecycle, from architecture and schematic design through validation, manufacturing, and production release.
Locations (2)
Taipei, Taipei City, Taiwan
Hsinchu, Hsinchu City, Taiwan
Responsibilities
Lead the design and development of advanced networking and wireless hardware products across the full hardware lifecycle, from architecture and schematic design through validation, manufacturing, and production release.
Design complex multilayer and HDI PCBs, define stack-ups, and develop mixed RF/digital layouts.
Perform signal integrity and power integrity analysis using industry-standard simulation tools.
Support EMC/ESD compliance and implement DFM/DFT practices.
Design PoE and DC-DC power systems, including power sequencing.
Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
Lead and execute automated place-and-route activities from floorplanning through GDSII tapeout, leveraging advanced physical design expertise and automation to improve productivity and design quality.
Responsibilities
Lead and execute automated place-and-route activities from floorplanning through GDSII tapeout
Leverage advanced physical design expertise and automation capabilities to drive productivity improvements
Optimize design flows and develop physical design methodologies
Work closely with cross-functional engineering teams to solve complex physical design challenges
Hardware architecture design for next generation router and network switch products.
Locations (2)
San Jose, California, United States
California, United States
Responsibilities
Hardware architecture design for next generation router and network switch product development
Actively working in high-speed interface design and analysis, including support 800G line cards and other complex signals
Requirement analysis and selection of key components for major interfaces like Processor SoC, DDR memory, GPU, FPGA, Network switch, PCIe Switch, Clock, Power management devices
Work on electronic products through hardware architecture finalization, high level design, critical components selection, schematics capture and design analysis
Providing PCB stack-up model and extract from tool to meet product PCB thickness, electrical signal speed, power architecture and trace impedance requirements
Electronic EngineerEdgeCortix · Remote, US+1 more
Senior/Lead VLS Engineer - Global CircuitsSambaNova Systems · San Jose, US