Verification Engineer responsible for system verification of powertrain propulsion systems using HIL rigs and vehicles, developing automated test methods, and collaborating with global teams.
Responsibilities
Perform system verification using HIL rigs and vehicles
Develop automated test methods, specifications, and verification scopes
Configure, maintain, and improve HIL rigs and test environments
Investigate failures, troubleshoot complex system behaviors, support root cause analysis
Collaborate with Product Owners, Embedded Solution Leaders, software developers, and stakeholders
Requirements
Engineering degree in Electrical Engineering, Electronics, Mechatronics, Control and Automation Engineering, Computer Engineering, or a related field
Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect
Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics
Execute complete verification project as a senior engineer with hands‑on experience, mentoring, client communication, in‑depth technical reviews and close tracking of technical and management aspects
Provide guidance to team on developing UVM‑based SV test‑benches, defining block, sub‑system and SOC top‑level test plans, PCIe, NVMe, NAND, DDR and CPU sub‑systems and verification methodologies, flows and quality metrics
Work independently with minimal guidance, solve complex problems, act as a resource for less experienced colleagues, contribute to process improvements, and provide informal guidance to junior staff
Execute complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews and close tracking of technical as well as management aspect
Provide guidance to team on developing UVM-based SV test-benches, defining block, sub-system and SOC top level test plans, PCIe, NVMe, NAND, DDR and CPU sub-systems and verification methodologies, flows and quality metrics
Execute complete verification projects as a senior engineer with hands-on experience, mentoring, and client communication. Provide guidance on UVM-based SV test-benches and verification methodologies for PCIe, NVMe, NAND, DDR and CPU sub-systems.
Responsibilities
Execute complete verification project in the role senior engineer
Mentoring and client communication / interactions
Perform in-depth technical reviews and close tracking of technical and management aspects
Provide guidance to team on developing UVM-based SV test-benches
Define block, sub-system and SOC top level test plans
Lead and own functional or performance verification of Fabric Top subsystem integration for Microsoft’s cloud hardware.
Compensation
Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
Responsibilities
Own or lead functional or performance verification of one or more aspects of Fabric Top subsystem integration, including coherency, traffic flows to and from memory and PCIe/CXL endpoints, and end-to-end interconnect functionality.
Partner with architecture, design, and verification teams to define verification strategies, test plans, and signoff criteria.
Develop and enhance UVM and/or Formal verification environments, performance measurement tools, automation infrastructure, and reusable collateral.
Drive bug discovery and root-cause analysis through simulation, formal analysis, assertions, coverage, and debug.
Improve verification productivity through automation, methodologies, and AI-driven solutions.
Requirements
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Senior Analog Design Engineer responsible for architecture, design, implementation, and validation of high-speed analog and mixed-signal integrated circuits for silicon photonics solutions.
Compensation
Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USD
Responsibilities
Architect, design, and validate high-speed, low-voltage, low-power analog and mixed-signal integrated circuits
Lead block-level design and collaborate with multidisciplinary teams
Plan and execute design activities while balancing performance, schedule, and quality objectives
Guide post-silicon test and characterization plans
Create and maintain comprehensive design documentation
Requirements
M.S. degree in Electrical Engineering or related field
Responsible for feasibility and performance analysis of spacecraft design, performance modeling, launch support, mission analysis, and system optimization for ICEYE’s SAR satellite constellation.
Responsibilities
Feasibility and performance analysis during all stages of spacecraft design
Analyze, model, and optimize performance of integrated SAR satellite systems
Support launch, early operations and commissioning activities
Perform mission analysis and develop flying rules
Lead initiatives to enhance reliability and performance for on-orbit operations
Requirements
Degree in Space Engineering, Physics, Electrical Engineering or other relevant discipline
Lead a digital design team and coordinate Bangalore activities for digital IC design, overseeing technical, commercial, and quality requirements, project planning, risk management, and process improvement.
Responsibilities
Lead and coordinate the Bangalore digital IC design team
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