- Sunnyvale, California, United States
- On-site
- $163K–$236K per year
- 8–10 years
Design and develop microarchitecture and RTL for Google’s TPU hardware acceleration platform.
Compensation
US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits
Responsibilities
- Define and document the microarchitecture for digital designs within the TPU
- Partner with Verification to develop test plans and debug RTL, and collaborate with Physical Design to achieve timing, area, power, and manufacturability goals
- Drive critical power optimization and automation initiatives across all on-chip-network components and subsystems
- Support post-silicon validation and hardware debugging efforts to ensure successful deployment
- Lead the development and enhancement of internal design tools, flows, and engineering methodologies
Requirements
- Bachelor's degree in Electrical Engineering
- Master's degree in Electrical Engineering
- PhD in Electrical Engineering
- Nice to have: Master's degree or PhD
- Nice to have: 10 years of RTL design experience



