Power analysis tools jobs

Define and document the microarchitecture for digital designs within the TPU
Partner with Verification to develop test plans and debug RTL, and collaborate with Physical Design to achieve timing, area, power, and manufacturability goals
Drive critical power optimization and automation initiatives across all on-chip-network components and subsystems
Support post-silicon validation and hardware debugging efforts to ensure successful deployment
Lead the development and enhancement of internal design tools, flows, and engineering methodologies

Digital Design Engineer II

Silicon Labs · Posted Nov 4, 2026

Develop world class, highly integrated, low power, System on a Chip devices to serve the IoT wireless market.

The annualized base pay range for this role is expected to be between $101,500 - $188,500 USD.

Develop complex SoC/chip Architectures with multiple processors, digital and mixed signal subsystems, multiple power, and clock domains with a goal towards optimizing power for specific customer scenarios.
RTL design of modules through SystemVerilog HDL coding, adhering to quality standards.
Prepare and hold architecture, design, and verification reviews with technical staff throughout project lifecycle
SoC level configuration and integration of digital and mixed-signal IPs.
Perform logic synthesis, full chip timing and power analysis to optimize designs for key customer scenarios.