Implement advanced ASIC package architecture, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions, supporting the end-to-end package strategy for high-performance mixed-signal and digital SoCs.
Compensation
Base salary range for this role is $180,000 – $260,000 + equity in the company
Responsibilities
Define ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints.
Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability.
Establish package design standards, methodologies, and best practices.
Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content.
Define and review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning.
Lead advanced ASIC package architecture and execution, with a strong focus on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions, owning the end-to-end package strategy for high-performance mixed-signal and digital SoCs.
Compensation
Base salary range for this role is $200,000 – $280,000 + equity in the company
Responsibilities
Own ASIC package architecture for FC-BGA and MCM solutions, including substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints.
Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability.
Define long-term packaging roadmap aligned with future ASIC nodes, bandwidth scaling, and multi-die integration.
Establish organizational package design standards, methodologies, and best practices.
Drive detailed design of FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content.
High-speed IC package development engineer responsible for package development, electrical design, modeling, and characterization, including signal and power integrity aspects.
Compensation
Expected Base Pay Range (USD) 142,700 - 211,230, $ per annum
Responsibilities
Develop advanced microelectronic packages for semiconductors supporting 448 Gb/s data rates and beyond
Design electrical layouts and model package behavior
Characterize packages using EM simulation tools
Select package technology and drive layout with suppliers
Ensure manufacturability and compliance with performance, reliability, and cost requirements
Requirements
Bachelor’s degree in Computer Science, Electrical Engineering or related fields
Master’s/PhD in Computer Science, Electrical Engineering or related fields
Own hardware development from requirements and architecture through schematic capture, PCB layout, validation, and production release.
Select components, define footprints, and manage bills of materials with attention to performance, availability, cost, and lifecycle.
Design analog and digital circuits, power supplies, sensor interfaces, communication interfaces (I²C, SPI, UART, USB, Ethernet, etc.), and microcontroller/processor subsystems.
Perform circuit simulation and engineering analysis to evaluate power, signal integrity, timing, and thermal performance.
Bring up and debug prototypes using oscilloscopes, logic analyzers, power supplies, electronic loads, and other lab equipment.
Requirements
Bachelor’s degree in Electrical Engineering
Nice to have: Master’s degree in Electrical Engineering
Senior engineer responsible for signal and power integrity analysis, modeling, and validation across high‑speed interconnects, collaborating globally with customers and engineering teams.
Compensation
$115,800.00 - $151,935.00
Responsibilities
Perform signal and power integrity analysis for high‑speed interconnects
Develop and validate electrical models for transmission lines, vias, connectors, and PDN
Define stack‑ups, impedance targets, and routing constraints
Evaluate and optimize reflections, insertion/return loss, crosstalk and jitter performance
Use EM and circuit tools (HFSS, ADS, SIwave, PowerSI) for analysis
Requirements
Bachelor’s degree in Electrical Engineering or related field
Master’s degree in Electrical Engineering or related field
Develop chip package board PDN models and perform simulations to verify supply noise, impedance, and transient response; define PI requirements, specifications, and decoupling strategies; debug and root cause PI issues; correlate silicon measurements with simulations; collaborate with architecture, silicon, package, and board teams to deliver system aware PI solutions; improve PI methodologies, automation flows, and analysis processes.
Responsibilities
Develop chip package board PDN models and perform simulations to verify supply noise, impedance, and transient response
Define PI requirements, specifications, and decoupling strategies for all major power rails
Debug and root cause PI issues during bring up, validation, and production phases
Correlate silicon measurements with simulations and refine models accordingly
Collaborate with architecture, silicon, package, and board teams to deliver system aware PI solutions
Requirements
Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronic Engineering, or related field
Assist in the design and development of embedded hardware systems, including component selection, schematic capture, printed circuit board (PCB) development, and FPGA integration.
Support feasibility studies, simulations, engineering analyses, and prototype evaluations to assess performance, reliability, manufacturability, and cost.
Partner with hardware, firmware, manufacturing, test, and quality teams throughout the product lifecycle to deliver high-quality solutions.
Participate in design reviews, troubleshooting activities, root-cause analysis, and corrective action implementation.
Perform laboratory testing, debugging, validation, and verification using standard test equipment and automated test systems.
Requirements
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
Nice to have: Internship, co-op, academic project, research, or hands-on experience involving embedded systems or electronics development
Nice to have: High-speed digital design, signal integrity, and power integrity principles
Nice to have: Scripting or automation tools such as Python, TCL, MATLAB
Nice to have: Simulation and analysis tools such as HyperLynx, Ansys, SIwave
Part of a premier design team responsible for the architecture, design, implementation, and integration of the baseband system for all Apple products, focusing on the digital and power management domain of wireless chipsets.
Responsibilities
Architecture, design, implementation, and integration of the baseband system for all Apple products
Responsible for digital and power management domain of all wireless chipset from concept to product announcement
Heavy cross-functional collaboration with Apple SoC, battery, sensors, and iOS teams
Maintain a firm grasp of the entire product landscape outside of wireless design
Perform international travel when approved
Requirements
BSEE
Nice to have: signal integrity and power integrity simulation
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