Referso Jobs

Senior Director, Engineering

Silvaco · Posted Nov 8, 2026

Open

Remote, Canada
Remote
Full-time · Director
10+ years

Senior Director, Engineering

Silvaco · Posted Nov 8, 2026

Open

Remote, Canada
Remote
Full-time · Director
10+ years

DFT Lead Engineer

Broadcom · Posted Nov 6, 2026

Open

Austin, Texas, United States
Senior
$144K–$230K per year
10+ years

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Lead DFT Engineer responsible for DFT programs from specification to production for Broadcom ASIC products.

Compensation

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

Responsibilities

Leading DFT programs from chip level specification to implementation and verification
Defining DFT specifications for ASICs
Implementing DFT including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Working closely with STA and DI Engineers for test closure
Generating, verifying and debugging test vectors before tape release

Requirements

Bachelor's in Electrical/Electronic/Computer Engineering
Master's in Electrical/Electronic/Computer Engineering

Skills

DFT background Scan insertion and scan compression ATPG vector generation Verilog coding Testbench generation Simulation

DFT Engineer

Broadcom · Posted Nov 6, 2026

Open

Austin, Texas, United States
5+ years

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Design, implement, and verify DFT programs for Broadcom ASIC products.

Compensation

The annual base salary range for this position is USD To USD

Responsibilities

Understanding Broadcom & customer DFT feature requirements
Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Working closely with STA and DI Engineers design closure for test
Generating, Verifying & Debugging Test vectors before tape release
Validating & Debugging Test vectors on ATE during the silicon bring up phase

Requirements

Bachelors in Electrical/Electronic/Computer Engineering
Masters Degree in Electrical/Electronic/Computer Engineering

Skills

TCL PERL RUBY PYTHON C++Verilog coding testbench generation & simulation

DFT Engineer

Broadcom · Posted Nov 6, 2026

Open

Austin, Texas, United States
5+ years

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Design, implement, and verify DFT programs for Broadcom ASIC products.

Compensation

The annual base salary range for this position is USD To USD

Responsibilities

Understand DFT feature requirements
Implement DFT including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Work closely with STA and DI Engineers for test closure
Generate, verify and debug test vectors before tape release
Validate and debug test vectors on ATE during silicon bring up

Requirements

Bachelor's in Electrical/Electronic/Computer Engineering
Master's in Electrical/Electronic/Computer Engineering

Skills

DFT background Scan insertion and compression ATPG vector generation Verilog coding Testbench generation Memory BIST insertion

Product Development Engineer

Altera · Posted Nov 3, 2026

Open

San Jose, California, United States
Full-time
$106K–$154K per year
3+ years

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Compensation

$106,200 - $153,675 USD

Responsibilities

Develop and implement DFT strategies for FPGAs, including scan insertion, BIST (Built-In Self-Test), and test compression techniques.
Collaborate with RTL design and verification teams to ensure testability features are embedded efficiently.
Define and implement test plans, patterns, and fault models to ensure optimal test coverage and yield.
Develop and maintain MBIST manufacturing test content flows and scripts.
Perform pre-silicon test pattern simulation and validation to ensure test effectiveness prior to tape-out.

Requirements

Bachelor's or Master's Degree in Electrical Engineering or related field
Nice to have: Master's Degree in Electrical Engineering, or equivalent (or other related Engineering degree)
Nice to have: Experience with Tessent MBIST flows for pattern development and knowledge of memory repair schemes and Memory algorithms
Nice to have: Post-silicon experience including pattern conversion, Automated Test Equipment (ATE) pattern bring-up and silicon characterization

Skills

IC design IC test

DFT Lead Engineer

Broadcom · Posted Nov 3, 2026

Open

San Jose, California, United States
On-site
Full-time · Lead
$144K–$230K per year
10+ years

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Principal DFT Engineer responsible for leading DFT programs from chip level specification through implementation and verification for SoC DFT designs.

Compensation

The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

Responsibilities

Understanding Broadcom & customer DFT feature requirements & DPPM goals & defining appropriate DFT specifications for the ASIC
Implementing DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes and other I/P DFT integration
Working closely with STA and DI Engineers design closure for test
Generating, Verifying & Debugging Test vectors before tape release
Validating & Debugging Test vectors on ATE during the silicon bring up phase

Requirements

Bachelors in Electrical/Electronic/Computer Engineering
Masters Degree in Electrical/Electronic/Computer Engineering
Nice to have: DFT Compiler
Nice to have: Mentor TestKompress
Nice to have: TetraMax

Skills

TCL PERL RUBY PYTHON C++

R&D Engineer IC Design

Broadcom · Posted Nov 2, 2026

Open

Bangalore, Karnataka, India
On-site
Full-time · Senior
6–8 years

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The role involves working on various phases of SoC DFT related activities including DFT architecture, test insertion, verification, pattern generation, coverage improvement, post silicon debug, and yield improvement.

Responsibilities

Work on SoC DFT architecture
Test insertion and verification
Pattern generation
Coverage improvement
Post silicon debug and yield improvement

Requirements

Bachelor’s degree
Master’s degree
Nice to have: perl
Nice to have: shell
Nice to have: Seimens-Mentor Graphics DFT tools

Skills

DFT concepts ATPG MBIST JTAG DFT insertion & verification pattern generation coverage improvement vector simulation post-silicon debug

Senior Director, Engineering

Senior Director, Engineering

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DFT Lead Engineer

Compensation

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DFT Engineer

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DFT Engineer

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Product Development Engineer

Compensation

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DFT Lead Engineer

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R&D Engineer IC Design

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FastScan jobs

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