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1–2 jobs· newest first

Sr. Design Engineer - ModelingNew
Lattice Semiconductor · Manila, Philippines
Senior
Integration Design EngineerNew
Lattice Semiconductor · Manila, Philippines
On-site · Full-time · Senior

+10K new in the last hour

Sr. Design Engineer - Modeling

Lattice Semiconductor · Posted Nov 9, 2026

Manila, Philippines
Senior

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Senior Design Engineer – Modeling position develops, validates, and delivers IP behavioral models and related hardware collateral used by internal engineering teams and software-facing customers.

Responsibilities

Develop and maintain IP functional and behavioral models using Verilog, SystemVerilog, and, where applicable, SystemC and C++.
Translate IP specifications, schematics, RTL, and design intent into clear model requirements, implementation plans, and verification objectives.
Perform functional testing, audits, lint and CDC checks, regression testing, and consistency or equivalency checks against approved hardware references and specifications.
Lead or support the generation, audit, validation, and release of timing, power, signal-integrity, configuration, and metadata deliverables used for hardware and software integration.
Investigate and resolve model behavior, hardware-to-software integration, and customer-facing issues across the IP development lifecycle.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field
Nice to have: timing
Nice to have: power
Nice to have: IBIS
Nice to have: signal-integrity

Skills

Verilog SystemVerilog SystemC C++Python Perl TCL Shell SPICE device models transistor-level design concepts digital simulation tools FPGA ASIC IP modeling verification flow RTL concepts simulation digital design fundamentals semiconductor principles integrated-circuit principles device behavior layout timing power signal integrity metadata deliverables automation verification plans process improvement technical leadership

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Integration Design Engineer

Lattice Semiconductor · Posted Nov 6, 2026

Manila, Metro Manila, Philippines
On-site
Full-time · Senior
5+ years

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The Integration Design Engineer will be part of the Silicon Integration Team, responsible for integrating different IPs to build the chip using both custom and digital design flows.

Responsibilities

Integrate different IPs to build the fullchip.
Deliver all corresponding models, views, and collaterals to functional teams.
Complete all required checks and simulations for sign-off.
Collaborate with Architecture, SW, IP Design, and Physical Design Teams to generate fullchip logical floorplan.
Generate fullchip behavioral model by integrating various IP models.

Requirements

BS or MS in Electronics Engineering
BS or MS in Computer Engineering
BS or MS in Electrical Engineering
Nice to have: FPGA design and integration
Nice to have: CPLD design and integration

Skills

Verilog System Verilog Custom Design Flow Digital Design Flow Semiconductor principles transistor-level analysis

Elaboration/Compilation

Equivalence Check

Cadence Virtuoso

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