- Cupertino, California, United States +1 more
- On-site
- Full-time
- $150K–$225K per year
1–5 jobs· newest first

$150K–$225KOn-site · Full-time

$208K–$225KOn-site

$150K–$225KOn-site · Full-time

$180K–$225KOn-site

$213K–$288KOn-site · Full-time · Senior
+10K new in the last hour
Contribute to all phases of the physical design of high-performance PHY design from RTL to delivery of final GDSII.
base pay range for this role is between $150,400 - $225,300/yr
Model power dissipation and power delivery for Apple’s silicon and IPs, establish voltage-frequency design points, and collaborate with technology, validation, and product engineering teams.
base pay range for this role is between $207,673 - $225,300/yr
Work with logic design team to understand partition architecture and drive physical aspects early in design cycle
The base pay range for this role is between $150,400 - $225,300/yr
Define the Micro-architecture of the CPU hardware. Develop the CPU hardware using a Hardware-Description-Language. Perform functional debug and closure of the design. Responsible for timing and power closure of the design for the target Frequency and Power. Prepare documentation of the Design Specification. Design and develop hardware for Apple's mobile devices. Evaluate new ideas and features for the Central Processing Unit (CPU) hardware.
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $180,294 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
Responsible for defining and implementing digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways.
USA, CA, Sunnyvale - 213,000.00 - 287,500.00 USD annually